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| author | Bill Wendling <isanbard@gmail.com> | 2008-11-24 19:21:46 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2008-11-24 19:21:46 +0000 |
| commit | 66835479d742e248c905e9dcd87b1d8e01b5aa0b (patch) | |
| tree | 6583f27af9280fa4b04e07e753973f5b5dc63df6 /llvm/lib/Target | |
| parent | 2e5df906f823fdc84b14095e877c3c4dda1b4b1d (diff) | |
| download | bcm5719-llvm-66835479d742e248c905e9dcd87b1d8e01b5aa0b.tar.gz bcm5719-llvm-66835479d742e248c905e9dcd87b1d8e01b5aa0b.zip | |
- Make lowering of "add with overflow" customizable by back-ends.
- Mark "add with overflow" as having a custom lowering for X86. Give it a null
lowering representation for now.
llvm-svn: 59971
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 13 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.h | 2 |
2 files changed, 15 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 9c5458d54ac..efe7bac72eb 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -780,6 +780,12 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM) // We want to custom lower some of our intrinsics. setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); + // Add with overflow operations are custom lowered. + setOperationAction(ISD::SADDO, MVT::i32, Custom); + setOperationAction(ISD::SADDO, MVT::i64, Custom); + setOperationAction(ISD::UADDO, MVT::i32, Custom); + setOperationAction(ISD::UADDO, MVT::i64, Custom); + // We have target-specific dag combine patterns for the following nodes: setTargetDAGCombine(ISD::VECTOR_SHUFFLE); setTargetDAGCombine(ISD::BUILD_VECTOR); @@ -6142,6 +6148,11 @@ SDValue X86TargetLowering::LowerCTTZ(SDValue Op, SelectionDAG &DAG) { return Op; } +SDValue X86TargetLowering::LowerXADDO(SDValue Op, SelectionDAG &DAG, + ISD::NodeType NTy) { + return SDValue(); +} + SDValue X86TargetLowering::LowerCMP_SWAP(SDValue Op, SelectionDAG &DAG) { MVT T = Op.getValueType(); unsigned Reg = 0; @@ -6321,6 +6332,8 @@ SDValue X86TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) { case ISD::FLT_ROUNDS_: return LowerFLT_ROUNDS_(Op, DAG); case ISD::CTLZ: return LowerCTLZ(Op, DAG); case ISD::CTTZ: return LowerCTTZ(Op, DAG); + case ISD::SADDO: return LowerXADDO(Op, DAG, ISD::SADDO); + case ISD::UADDO: return LowerXADDO(Op, DAG, ISD::UADDO); // FIXME: REMOVE THIS WHEN LegalizeDAGTypes lands. case ISD::READCYCLECOUNTER: diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h index 2358889fda8..e9d8e55e106 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.h +++ b/llvm/lib/Target/X86/X86ISelLowering.h @@ -592,6 +592,8 @@ namespace llvm { SDValue LowerFLT_ROUNDS_(SDValue Op, SelectionDAG &DAG); SDValue LowerCTLZ(SDValue Op, SelectionDAG &DAG); SDValue LowerCTTZ(SDValue Op, SelectionDAG &DAG); + SDValue LowerXADDO(SDValue Op, SelectionDAG &DAG, ISD::NodeType NTy); + SDValue LowerCMP_SWAP(SDValue Op, SelectionDAG &DAG); SDValue LowerLOAD_SUB(SDValue Op, SelectionDAG &DAG); SDValue LowerATOMIC_BINARY_64(SDValue Op, SelectionDAG &DAG, |

