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* Remove the form field from Mips16 instruction formats and set thingsReed Kotler2013-02-143-87/+73
* Don't assume the mangling of static functions.Rafael Espindola2013-02-141-6/+0
* Don't asume that a static function in an extern "C" block will not be mangled.Rafael Espindola2013-02-141-1/+1
* temporarily revert the patch due to some conflictsWeiming Zhao2013-02-132-150/+6
* Hexagon: add support for predicate-GPR copies.Anshuman Dasgupta2013-02-131-0/+12
* R600: Add support for 128-bit parametersTom Stellard2013-02-132-0/+5
* Don't build tail calls to functions with three inreg arguments on x86-32 PIC.Nick Lewycky2013-02-131-5/+11
* Bug fix 13622: Add paired register support for inline asm with 64-bit data on...Weiming Zhao2013-02-132-6/+150
* Hexagon: Use absolute addressing mode loads/stores for global+offset Jyotsna Verma2013-02-136-1052/+224
* [ms-inline-asm] Add support for memory references that have non-immediateChad Rosier2013-02-131-13/+18
* For Mips 16, add the optimization where the 16 bit form of addiu sp can be usedReed Kotler2013-02-133-3/+46
* MIsched: HazardRecognizers are created for each DAG. Free them.Andrew Trick2013-02-131-1/+3
* Add registration for PPC-specific passes to allow the IR to be dumpedKrzysztof Parzyszek2013-02-133-3/+41
* X86: Disable generation of rep;movsl when %esi is used as a base pointer.Benjamin Kramer2013-02-131-0/+8
* Make jumptables work for -staticReed Kotler2013-02-131-0/+2
* Prevent insertion of "vzeroupper" before call that preserves YMM registers, s...Elena Demikhovsky2013-02-131-0/+10
* Check i1 as well as i8 variables for 8 bit registers for x86 inlineEric Christopher2013-02-131-1/+1
* Test commit. Fixed typo.David Peixotto2013-02-131-1/+1
* Hexagon: Add support to generate predicated absolute addressing modeJyotsna Verma2013-02-121-20/+123
* [NVPTX] Disable vector registersJustin Holewinski2013-02-1217-1997/+1274
* R600: Fix regression with shadow array sampler on pre-SI GPUs.Michel Danzer2013-02-121-1/+1
* ARM cost model: Add vector reverse shuffle costsArnold Schwaighofer2013-02-121-0/+33
* ARM NEON: Handle v16i8 and v8i16 reverse shufflesArnold Schwaighofer2013-02-121-1/+37
* Added 0x0D to 2-byte opcode extension table for prefetch* variantsKay Tiong Khoo2013-02-121-4/+2
* [mips] Expand pseudo instructions before they are emitted inAkira Hatanaka2013-02-111-11/+38
* [mips] Fix indentation.Akira Hatanaka2013-02-111-41/+39
* Extend Hexagon hardware loop generation to handle various additional cases:Krzysztof Parzyszek2013-02-114-382/+1470
* Implement HexagonInstrInfo::analyzeCompare.Krzysztof Parzyszek2013-02-112-0/+86
* *fixed disassembly of some i386 system insts with intel syntaxKay Tiong Khoo2013-02-111-4/+4
* R600/SI: Use V_ADD_F32 instead of V_MOV_B32 for clamp/neg/abs modifiers.Michel Danzer2013-02-111-15/+9
* AArch64: fix build on some MSVC versionsTim Northover2013-02-111-3/+3
* AArch64: Simplify logic in deciding whether bfi is validTim Northover2013-02-111-6/+1
* Make use of DiagnosticType to provide better AArch64 diagnostics.Tim Northover2013-02-112-18/+218
* Currently, codegen may spent some time in SDISel passes even if an entireEvan Cheng2013-02-111-0/+74
* Spelling correctionJoel Jones2013-02-101-1/+1
* Test Commit - Remove some trailing whitespace in R600Instructions.tdVincent Lejeune2013-02-101-6/+6
* [NVPTX] Make address space errors more explicit (llvm_unreachable -> report_f...Justin Holewinski2013-02-091-1/+2
* R600: Dump the function name when TargetLowering::LowerCall() failsTom Stellard2013-02-081-0/+5
* R600: rework flow creation in the structurizer v2Tom Stellard2013-02-081-177/+195
* R600: fix loop analyses in the structurizerTom Stellard2013-02-081-113/+183
* R600: fix PHI value adding in the structurizerTom Stellard2013-02-081-65/+81
* Add the 16 bit version of addiu. To the assembler, the 16 and 32 bit are theReed Kotler2013-02-082-0/+21
* Refine fix to bug 15041.Bill Schmidt2013-02-081-18/+17
* ARM cost model: Address computation in vector mem ops not freeArnold Schwaighofer2013-02-081-2/+11
* When Mips16 frames grow large, the immediate field may exceed the maximumReed Kotler2013-02-083-10/+90
* [mips] Make Filler a class and reduce indentation.Akira Hatanaka2013-02-071-34/+38
* Constrain PowerPC autovectorization to fix bug 15041.Bill Schmidt2013-02-071-0/+19
* [mips] Add definition of JALR instruction which has two register operands. Ch...Akira Hatanaka2013-02-073-3/+14
* R600/SI: cleanup VGPR encodingTom Stellard2013-02-075-178/+16
* R600/SI: Handle VGPR64 destination in copyPhysReg().Tom Stellard2013-02-071-1/+9
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