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| author | Chad Rosier <mcrosier@apple.com> | 2013-02-13 21:33:44 +0000 |
|---|---|---|
| committer | Chad Rosier <mcrosier@apple.com> | 2013-02-13 21:33:44 +0000 |
| commit | 282edd7caabaf148f1349d1fc287a9b2e1bfb5fb (patch) | |
| tree | 4fbe45ce44231e7553026887291e3e93a852e484 /llvm/lib/Target | |
| parent | f43fcf519472a65db3b142a3396278de25d344b3 (diff) | |
| download | bcm5719-llvm-282edd7caabaf148f1349d1fc287a9b2e1bfb5fb.tar.gz bcm5719-llvm-282edd7caabaf148f1349d1fc287a9b2e1bfb5fb.zip | |
[ms-inline-asm] Add support for memory references that have non-immediate
displacements.
rdar://12974533
llvm-svn: 175083
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86AsmPrinter.cpp | 31 |
1 files changed, 18 insertions, 13 deletions
diff --git a/llvm/lib/Target/X86/X86AsmPrinter.cpp b/llvm/lib/Target/X86/X86AsmPrinter.cpp index 75fa9d20740..ac5daec2b25 100644 --- a/llvm/lib/Target/X86/X86AsmPrinter.cpp +++ b/llvm/lib/Target/X86/X86AsmPrinter.cpp @@ -252,14 +252,15 @@ void X86AsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, } case MachineOperand::MO_Immediate: - O << '$' << MO.getImm(); + if (AsmVariant == 0) O << '$'; + O << MO.getImm(); return; case MachineOperand::MO_JumpTableIndex: case MachineOperand::MO_ConstantPoolIndex: case MachineOperand::MO_GlobalAddress: case MachineOperand::MO_ExternalSymbol: { - O << '$'; + if (AsmVariant == 0) O << '$'; printSymbolOperand(MO, O); break; } @@ -355,19 +356,23 @@ void X86AsmPrinter::printIntelMemReference(const MachineInstr *MI, unsigned Op, NeedPlus = true; } - assert (DispSpec.isImm() && "Displacement is not an immediate!"); - int64_t DispVal = DispSpec.getImm(); - if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg())) { - if (NeedPlus) { - if (DispVal > 0) - O << " + "; - else { - O << " - "; - DispVal = -DispVal; + if (!DispSpec.isImm()) { + if (NeedPlus) O << " + "; + printOperand(MI, Op+3, O, Modifier, AsmVariant); + } else { + int64_t DispVal = DispSpec.getImm(); + if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg())) { + if (NeedPlus) { + if (DispVal > 0) + O << " + "; + else { + O << " - "; + DispVal = -DispVal; + } } + O << DispVal; } - O << DispVal; - } + } O << ']'; } |

