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| author | Kay Tiong Khoo <kkhoo@perfwizard.com> | 2013-02-12 00:19:12 +0000 |
|---|---|---|
| committer | Kay Tiong Khoo <kkhoo@perfwizard.com> | 2013-02-12 00:19:12 +0000 |
| commit | ab588efe420a9c3f9ad820d40db88f557661acdc (patch) | |
| tree | acbece9242169e8a19373ed399d9746338188a26 /llvm/lib/Target | |
| parent | 5824a4f1b0962bfe7a80d382d0ed9ce2050d3d88 (diff) | |
| download | bcm5719-llvm-ab588efe420a9c3f9ad820d40db88f557661acdc.tar.gz bcm5719-llvm-ab588efe420a9c3f9ad820d40db88f557661acdc.zip | |
Added 0x0D to 2-byte opcode extension table for prefetch* variants
Fixed decode of existing 3dNow prefetchw instruction
Intel is scheduled to add a compatible prefetchw (same encoding) to future CPUs
llvm-svn: 174920
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86Instr3DNow.td | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86Instr3DNow.td b/llvm/lib/Target/X86/X86Instr3DNow.td index 54b91c3edb8..bb362f5c7bb 100644 --- a/llvm/lib/Target/X86/X86Instr3DNow.td +++ b/llvm/lib/Target/X86/X86Instr3DNow.td @@ -87,12 +87,10 @@ defm PMULHRW : I3DNow_binop_rm_int<0xB7, "pmulhrw">; def FEMMS : I3DNow<0x0E, RawFrm, (outs), (ins), "femms", [(int_x86_mmx_femms)]>; def PREFETCH : I3DNow<0x0D, MRM0m, (outs), (ins i32mem:$addr), - "prefetch $addr", []>; + "prefetch\t$addr", []>; -// FIXME: Diassembler gets a bogus decode conflict. -let isAsmParserOnly = 1 in def PREFETCHW : I3DNow<0x0D, MRM1m, (outs), (ins i16mem:$addr), - "prefetchw $addr", []>; + "prefetchw\t$addr", []>; // "3DNowA" instructions defm PF2IW : I3DNow_conv_rm_int<0x1C, "pf2iw", "a">; |
