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* AMDGPU: Fix missing implicit m0 uses on movrel instructionsMatt Arsenault2015-10-071-0/+7
* [AArch64] Fold a floating-point multiply by power of two into fp conversion.Chad Rosier2015-10-071-0/+70
* [ARM] Promote helper function to SelectionDAG.Chad Rosier2015-10-071-34/+12
* Test commit access. Fixed comment to have correct input parameter name andKevin B. Smith2015-10-071-1/+1
* [ARM] Use correct half-precision functions in EABI modeOliver Stannard2015-10-071-0/+8
* [ARM] Prevent PerformVDIVCombine from combining a vcvt/vdiv with 8 lanes.Chad Rosier2015-10-071-3/+4
* [ARM][AArch64] Only lower to interleaved load/store if the target has NEONJeroen Ketema2015-10-072-10/+11
* Use non virtual destructors for sections.Rafael Espindola2015-10-072-21/+21
* [ARM] Push more complex check down to reduce compile time. NFC.Chad Rosier2015-10-071-10/+10
* Don't repeat names in comments and don't indent in namespaces. NFC.Rafael Espindola2015-10-071-3/+2
* Revert: r249536 - Testing commit access with a trival whitespace change.Scott Egerton2015-10-071-1/+1
* Testing commit access with a trival whitespace change.Scott Egerton2015-10-071-1/+1
* [X86] Emit .cfi_escape GNU_ARGS_SIZE when adjusting the stack before callsMichael Kuperstein2015-10-071-2/+19
* AVX512: Change encoding of vpshuflw and vpshufhw instructions. Implement WIG ...Igor Breger2015-10-071-3/+2
* AMDGPU: Add comment for VOP2b operand classMatt Arsenault2015-10-071-0/+5
* AMDGPU: Properly register passesMatt Arsenault2015-10-071-2/+2
* AMDGPU: Use explicit register size indirect pseudosMatt Arsenault2015-10-073-17/+28
* AMDGPU: Remove inferRegClassFromUses / inferRegClassFromDefsMatt Arsenault2015-10-071-70/+0
* Fix Clang-tidy modernize-use-nullptr warnings in source directories and gener...Hans Wennborg2015-10-061-4/+5
* AMDGPU/SI: Remove calling convention assertion from LowerFormalArguments()Tom Stellard2015-10-061-1/+1
* [ARM] Minor refactoring. NFC.Chad Rosier2015-10-061-2/+4
* [ARM] Minor refactoring. NFC.Chad Rosier2015-10-061-8/+10
* [ARM] Minor refactoring. NFC.Chad Rosier2015-10-061-9/+8
* [WinEH] Recognize CoreCLR personality functionJoseph Tremoulet2015-10-062-6/+6
* [ARM] Minor refactoring to improve readability. NFC.Chad Rosier2015-10-061-13/+14
* [Hexagon] Remove ZeroOrMore from option flagsKrzysztof Parzyszek2015-10-061-4/+3
* AMDGPU/SI: Add 64-bit versions of v_nop and v_clrexcpTom Stellard2015-10-065-25/+56
* [Hexagon] Add an early if-conversion passKrzysztof Parzyszek2015-10-064-17/+1149
* [mips][microMIPS] Fix an issue with selecting sqrt instruction in LLVM backendDaniel Sanders2015-10-061-5/+2
* Revert r249123 - [mips][microMIPS] Fix an issue with selecting sqrt instructi...Daniel Sanders2015-10-061-2/+5
* [bpf] Avoid extra pointer arithmetic for stack accessAlexei Starovoitov2015-10-063-7/+58
* [X86] Teach constant hoisting that ANDs with 64-bit immediates in the range 0...Craig Topper2015-10-061-1/+7
* [X86] Remove unnecessary AddComplexity directive. The instruction is already ...Craig Topper2015-10-061-1/+0
* [WebAssembly] Switch to a more traditional assembly syntaxDan Gohman2015-10-064-144/+113
* [WinEH] Update CATCHRET's operand to match its successorDavid Majnemer2015-10-051-0/+1
* AMDGPU/SI: Add a helper for creating aliases for the _e32 instructionsTom Stellard2015-10-051-11/+49
* [ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM.Scott Douglass2015-10-058-30/+166
* [mips][microMIPS] Implement JALRC16, JRCADDIUSP and JRC16 instructionsZoran Jovanovic2015-10-055-5/+82
* [MC layer][AArch64] llvm-mc accepts 4-bit immediate values forAlexandros Lamprineas2015-10-055-13/+87
* [mips] Changed the way symbols are handled in dla and la instructions to allo...Daniel Sanders2015-10-051-12/+9
* Fix pr24486.Rafael Espindola2015-10-058-13/+13
* [SPARCv9] Add support for the rdpr/wrpr instructions.Joerg Sonnenberger2015-10-044-0/+131
* AVX512: Implemented encoding and intrinsics for VPERMILPS/PD instructions.Igor Breger2015-10-044-61/+102
* Fix typo in READMEJeroen Ketema2015-10-041-1/+1
* [X86] Lower SEXTLOAD using SIGN_EXTEND_VECTOR_INREG. NCI.Simon Pilgrim2015-10-031-22/+5
* [WebAssembly] Implement the remaining conversion operations.Dan Gohman2015-10-031-31/+54
* AMDGPU/SI: Remove unused tablegen multiclassTom Stellard2015-10-031-16/+0
* [WebAssembly] Rename setlocal to set_local to match the spec.Dan Gohman2015-10-031-1/+1
* [WebAssembly] Fix CFG stackification of nested loops.Dan Gohman2015-10-021-4/+15
* [WebAssembly] Support calls marked as "tail", fastcc, and coldcc.Dan Gohman2015-10-021-4/+14
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