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* Make headers self-contained again.Benjamin Kramer2016-03-041-0/+1
* [X86][AVX512BW] Fixed 512-bit PSHUFB shuffle mask decode and added combine test.Simon Pilgrim2016-03-031-3/+3
* [X86][AVX] Better support for the variable mask form of VPERMILPD/VPERMILPSSimon Pilgrim2016-03-033-19/+35
* [X86] Tidied up 256-bit -> 2 x 128-bit vector shift extraction.Simon Pilgrim2016-03-031-14/+2
* [X86] Pulled out repeated code testing for constant vector shift amount. NFCI.Simon Pilgrim2016-03-031-8/+6
* MCU target has its own ABI, however X86 interrupt handler calling convention ...Amjad Aboud2016-03-031-1/+3
* [X86] Don't assume that shuffle non-mask operands starts at #0.Ahmed Bougacha2016-03-032-32/+68
* AVX512: Combine AND + TESTM instructions .Igor Breger2016-03-033-8/+25
* [X86][SSE] Improve vector ZERO_EXTEND by combining to ZERO_EXTEND_VECTOR_INREGSimon Pilgrim2016-03-031-9/+24
* [LLVM][AVX512] PSRLWI Chnage imm8 to intMichael Zuckerman2016-03-031-3/+3
* [X86] Enable forwarding bool arguments in tail calls (PR26305)Hans Wennborg2016-03-031-0/+20
* [X86] Don't give catch objects a displacement of zeroDavid Majnemer2016-03-033-1/+23
* Revert "[X86] Elide references to _chkstk for dynamic allocas"Reid Kleckner2016-03-021-29/+9
* [LLVM][AVX512]PSRAWI Change imm8 to int.Michael Zuckerman2016-03-021-9/+9
* [X86][SSE] Lower 128-bit MOVDDUP with existing VBROADCAST mechanismsSimon Pilgrim2016-03-021-39/+51
* [X86] Remove unnecessary call to isReg from emitter's DestMem handling for VE...Craig Topper2016-03-021-7/+5
* [X86] Make X86MCCodeEmitter::DetermineREXPrefix locate operands more like how...Craig Topper2016-03-021-54/+50
* [X86] Permit reading of the FLAGS register without it being previously definedDavid Majnemer2016-03-022-3/+8
* [X86] Remove assertion I accidentally left in.Craig Topper2016-03-021-1/+0
* [X86] Be more structured about how we capture the register number when it is ...Craig Topper2016-03-021-41/+39
* [X86] Use MCPhysReg and uint16_t for static arrays of registers and opcodes r...Craig Topper2016-03-025-16/+16
* [x86] use getBitcast()Sanjay Patel2016-03-011-20/+20
* TableGen: Check scheduling models for completenessMatthias Braun2016-03-012-0/+2
* [X86] Elide references to _chkstk for dynamic allocasDavid Majnemer2016-03-011-9/+29
* fix function names; NFCSanjay Patel2016-03-011-157/+151
* DAGCombiner: Turn extract of bitcasted integer into truncateMatt Arsenault2016-03-011-7/+12
* [LLVM][AVX512] PSRL{DI|QI} Change imm8 to intMichael Zuckerman2016-03-011-6/+6
* [X86] Check that attribute parameters match for tail calls (PR26590)Hans Wennborg2016-03-011-3/+24
* fix documentation comments; NFCSanjay Patel2016-03-011-85/+74
* function names start with a lowercase letter; NFCSanjay Patel2016-03-011-12/+12
* [AVX512][PSRAQ][PSRAD] Change imm8 to int.Michael Zuckerman2016-03-011-6/+6
* Disallow generating vzeroupper before return instruction (iret) in interrupt ...Amjad Aboud2016-03-011-3/+8
* [X86] Centralize the masking of TSFlags with FormMask into a variable earlier...Craig Topper2016-03-011-6/+3
* [X86] Localize a temporary variable into the cases its need in. NFCCraig Topper2016-03-011-10/+9
* [X86] Be consistent about using pre/post increment/decrement in nearby code. NFCCraig Topper2016-03-011-4/+4
* [X86] Combine some initialization code with variable declaration and comments...Craig Topper2016-03-011-41/+28
* [X86] Move the ATOMIC_LOAD_OP ISel from DAGToDAG to ISelLowering. NFCI.Ahmed Bougacha2016-02-295-340/+166
* [WinEH] Make setjmp work correctly with EHDavid Majnemer2016-02-291-20/+136
* [AVX512][PSLLW ][PSLLV] Change imm8 to intMichael Zuckerman2016-02-281-3/+3
* CodeGen: Change MachineInstr to use MachineInstr&, NFCDuncan P. N. Exon Smith2016-02-271-1/+1
* Tidyup for loops - don't repeat upper limit evaluation if you don't have to. ...Simon Pilgrim2016-02-271-5/+5
* Strip trailing whitespace. NFCI.Simon Pilgrim2016-02-271-9/+9
* [X86] Fix a stale comment. NFC.Ahmed Bougacha2016-02-261-2/+2
* [X86] Remove the unused SDTX86atomicBinary. NFC.Ahmed Bougacha2016-02-261-2/+0
* Strip trailing whitespace. NFCI.Simon Pilgrim2016-02-262-10/+10
* Fix spelling. NFCI.Simon Pilgrim2016-02-261-1/+1
* [x86] refactor to eliminate duplicated code; NFCISanjay Patel2016-02-261-23/+12
* [x86, AVX] fold 'isPositive' 256-bit vector integer operations (PR26701)Sanjay Patel2016-02-261-4/+13
* [x86, SSE] fold 'isPositive' vector integer operations (PR26701)Sanjay Patel2016-02-261-0/+42
* [X86] Null out some redundant patterns for masked vector register to register...Craig Topper2016-02-261-10/+19
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