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path: root/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
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* [X86] Add costs for non-AVX512 single-source permutation integer shufflesMichael Kuperstein2017-02-021-3/+16
* [TargetTransformInfo] Refactor and improve getScalarizationOverhead()Jonas Paulsson2017-01-261-14/+0
* [X86] enable memory interleaving for X86\SLM arch. Mohammed Agabaria2017-01-251-1/+1
* Remove trailing whitespace. NFCI.Simon Pilgrim2017-01-201-1/+1
* [CostModel][X86] Removed unused cost. NFCI.Simon Pilgrim2017-01-201-1/+0
* [CostModel][X86] Fix AVX512BW vector shift costs for vXi16 typesSimon Pilgrim2017-01-151-0/+8
* [CostModel][X86] Updated vXi64 ASHR costs on AVX512 targets now that D28604 h...Simon Pilgrim2017-01-141-0/+8
* [X86][AVX512BW] Vectorize v64i8 vector shiftsSimon Pilgrim2017-01-111-0/+4
* [X86] updating TTI costs for arithmetic instructions on X86\SLM arch.Mohammed Agabaria2017-01-111-3/+50
* [CostModel][X86] Fixed vXi8 uniform shift costs.Simon Pilgrim2017-01-081-6/+16
* [CostModel][X86] Moved legal uniform shift costs earlier.Simon Pilgrim2017-01-081-24/+39
* [CostModel][X86] Update SSE41/AVX1 vXi32 SHL costsSimon Pilgrim2017-01-071-0/+2
* [CostModel][X86] Fix AVX2 v16i16 shift 'splat' costs.Simon Pilgrim2017-01-071-2/+15
* [CostModel][X86] Match 256-bit vector shift 'splat' costs for AVX2 and aboveSimon Pilgrim2017-01-071-45/+44
* [CostModel][X86] Generalized cost calculation of SHL by constant -> MUL conve...Simon Pilgrim2017-01-071-21/+10
* [CostModel][X86] Merge separate AVX1 cost LUTs. NFCI.Simon Pilgrim2017-01-071-38/+30
* [CostModel][AVX512BW] Add v32i16 vector shift costs for avx512bw targets.Simon Pilgrim2017-01-071-0/+4
* [CostModel][X86] Added missing AVX2 arithmetic costs.Simon Pilgrim2017-01-071-23/+33
* [CostModel][X86] Reordered AVX1 arithmetic cost LUT into descending target or...Simon Pilgrim2017-01-071-27/+27
* [X86][AVX512] Use lowerShuffleAsRepeatedMaskAndLanePermute for non-VBMI v64i8...Simon Pilgrim2017-01-071-2/+1
* [CostModel][X86] Fix 512-bit SDIV/UDIV 'big' costs.Simon Pilgrim2017-01-061-16/+18
* [CostModel][X86] Tidyup arithmetic costs code. NFCI.Simon Pilgrim2017-01-051-28/+15
* [CostModel][X86] Move vXi32 MUL costs into existing tables. NFCI.Simon Pilgrim2017-01-051-6/+5
* Remove trailing whitespace. NFCI.Simon Pilgrim2017-01-051-3/+3
* [CostModel][X86] Reordered SSE42 arithmetic cost LUT into descending order. N...Simon Pilgrim2017-01-051-13/+11
* [CostModel][X86] Move vXi64 MUL costs into existing tables. NFCI.Simon Pilgrim2017-01-051-11/+3
* [CostModel][X86] Strip unused 256-bit vector shift costs. NFCI.Simon Pilgrim2017-01-051-8/+0
* [CostModel][X86] Include the cost of 256-bit upper subvector extract/insertio...Simon Pilgrim2017-01-051-2/+2
* [CostModel][X86] Merged SK_PermuteSingleSrc/SK_PermuteTwoSrc into common shuf...Simon Pilgrim2017-01-051-272/+227
* [CostModel][X86] Add support for broadcast shuffle costsSimon Pilgrim2017-01-051-9/+48
* [CostModel][X86] Pulled out common type legalization codeSimon Pilgrim2017-01-051-7/+4
* Currently isLikelyComplexAddressComputation tries to figure out if the given ...Mohammed Agabaria2017-01-051-4/+16
* [Test Commit] fixing some format issue in X86TTI to match clang-format output.Mohammed Agabaria2017-01-051-3/+6
* [CostModel][X86] Updated vXi8 and vXi16 Reverse/Alternate shuffle costsSimon Pilgrim2017-01-041-11/+9
* [X86] Merged Reverse/Alternate shuffle cost tables. NFCI.Simon Pilgrim2017-01-041-141/+81
* Fixed shuffle-reverse cost on AVX-512.Elena Demikhovsky2017-01-021-0/+1
* AVX-512 Loop Vectorizer: Cost calculation for interleave load/store patterns.Elena Demikhovsky2017-01-021-9/+243
* [X86][SSE] Improve lowering of vXi64 multiplies Simon Pilgrim2016-12-211-8/+8
* [CostModel][X86] Updated reverse shuffle costsSimon Pilgrim2016-12-151-5/+95
* [X86][AVX512] Add support for v2i64 fptosi/fptoui/sitofp/uitofp on AVX512DQ-o...Simon Pilgrim2016-11-241-0/+4
* [X86][AVX512] Add support for v4i64 fptosi/fptoui/sitofp/uitofp on AVX512DQ-o...Simon Pilgrim2016-11-231-0/+4
* [CostModel][X86] Add missing AVX512DQ v8i64 fptosi/sitofp costsSimon Pilgrim2016-11-231-6/+12
* [CostModel][X86] Added mul costs for vXi8 vectorsSimon Pilgrim2016-11-141-5/+21
* [X86][AVX] Fixed v16i16/v32i8 ADD/SUB costs on AVX1 subtargetsSimon Pilgrim2016-11-141-0/+4
* [VectorLegalizer] Expansion of CTLZ using CTPOP when possibleSimon Pilgrim2016-11-081-1/+4
* Improved cost model for FDIV and FSQRT, by Andrew TischenkoAlexey Bataev2016-10-311-2/+74
* [X86][AVX512] Fix MUL v8i64 costs on non-AVX512DQ targetsSimon Pilgrim2016-10-271-0/+1
* [X86][AVX512DQ] Improve lowering of MUL v2i64 and v4i64Simon Pilgrim2016-10-271-0/+13
* [X86][SSE] Add SSE41/AVX1 costs for vector shifts.Simon Pilgrim2016-10-231-0/+26
* [X86] Enable interleaved memory access by defaultMichael Kuperstein2016-10-201-0/+7
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