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path: root/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
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* [PartiallyInlineLibCalls][x86] add TTI hook to allow sqrt inlining to depend ...Sanjay Patel2017-11-271-0/+4
* [X86] Don't report gather is legal on Skylake CPUs when AVX2/AVX512 is disabl...Craig Topper2017-11-251-3/+5
* [X86] Spell penryn correctly in some comments. NFCCraig Topper2017-11-221-3/+3
* [LV][X86] Support of AVX2 Gathers code generation and update the LV with thisMohammed Agabaria2017-11-201-6/+13
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-2/+2
* [TTI][X86] update costs of interleaved load\store of i64\doubleMohammed Agabaria2017-11-161-0/+6
* [X86] Update TTI to report that v1iX/v1fX types aren't legal for masked gathe...Craig Topper2017-11-161-2/+10
* [SLP] Fix PR35047: Fix default cost model for cast op in X86.Alexey Bataev2017-11-071-1/+1
* [LV][X86] update the cost of interleaving mem. access of floatsMohammed Agabaria2017-11-061-1/+4
* [REVERT][LV][X86] update the cost of interleaving mem. access of floatsMohammed Agabaria2017-11-051-4/+1
* [LV][X86] update the cost of interleaving mem. access of floatsMohammed Agabaria2017-11-051-1/+4
* [CodeGen][ExpandMemcmp] Allow memcmp to expand to vector loads (2).Clement Courbet2017-10-301-4/+29
* [AVX512][AVX2]Cost calculation for interleave load/store patterns {v8i8,v16i8...Michael Zuckerman2017-10-181-7/+43
* [CodeGenPrepare][NFC] Rename TargetTransformInfo::expandMemCmp -> TargetTrans...Clement Courbet2017-09-251-1/+1
* [DivRempairs] add a pass to optimize div/rem pairs (PR31028)Sanjay Patel2017-09-091-0/+5
* [SLP] Support for horizontal min/max reduction.Alexey Bataev2017-09-081-0/+146
* X86: Improve AVX512 fptoui loweringZvi Rackover2017-09-071-0/+4
* Model cache size and associativity in TargetTransformInfoTobias Grosser2017-08-241-0/+51
* Changed basic cost of store operation on X86Elena Demikhovsky2017-08-201-0/+15
* [CostModel][X86][XOP] Improve costs for XOP shufflesSimon Pilgrim2017-08-161-0/+22
* [CostModel][X86] Add SSE2 two-src shuffle costsSimon Pilgrim2017-08-101-0/+2
* [CostModel][X86] Add avx1 two-src shuffle costsSimon Pilgrim2017-08-101-0/+9
* [CostModel][X86] Add avx2 two-src shuffle costsSimon Pilgrim2017-08-101-2/+11
* [CostModel][X86] Improve single src shuffle costsSimon Pilgrim2017-08-101-11/+36
* Reapply fix PR23384 (part 3 of 3) r304824 (was reverted in r305720).Evgeny Stupachenko2017-08-071-0/+11
* Strip trailing whitespace. NFCI.Simon Pilgrim2017-07-311-7/+7
* [Cost] Rename getReductionCost() to getArithmeticReductionCost(), NFC.Alexey Bataev2017-07-311-3/+3
* [X86][CM] update add\sub costs of vectors of 64 in X86\SLM archMohammed Agabaria2017-07-021-4/+9
* [AVX2] [TTI CostModel] Add cost of interleaved loads/stores for AVX2Dorit Nuzman2017-06-251-0/+112
* [x86] enable CGP memcmp() expansion for 2/4/8 byte sizesSanjay Patel2017-06-201-0/+6
* Revert r304824 "Fix PR23384 (part 3 of 3)"Hans Wennborg2017-06-191-11/+0
* Fix PR23384 (part 3 of 3)Evgeny Stupachenko2017-06-061-0/+11
* [Atomics][LoopIdiom] Recognize unordered atomic memcpyAnna Thomas2017-06-061-0/+2
* [X86][AVX512] Add 512-bit vector ctpop costs + testsSimon Pilgrim2017-05-181-0/+6
* [X86][AVX512] Add 512-bit vector ctlz costs + testsSimon Pilgrim2017-05-171-0/+24
* [X86][AVX512] Add 512-bit vector cttz costs + testsSimon Pilgrim2017-05-171-0/+6
* [X86][AVX512] Add 512-bit vector bitreverse costs + testsSimon Pilgrim2017-05-171-0/+18
* [X86][AVX1] Account for cost of extract/insert of 256-bit shiftsSimon Pilgrim2017-05-141-49/+49
* [X86][AVX2] Fix costs for v4i64 ashr by splatSimon Pilgrim2017-05-141-0/+5
* [X86][AVX1] Account for cost of extract/insert of 256-bit shifts by splatSimon Pilgrim2017-05-141-12/+12
* [X86][AVX1] Account for cost of extract/insert of 256-bit SDIV/UDIV by mul se...Simon Pilgrim2017-05-141-17/+17
* [X86][XOP] XOP's general v16i8 shifts will be used instead of v8i16 shift + m...Simon Pilgrim2017-05-141-3/+6
* [X86][SSE] Account for cost of extract/insert of v32i8 vector shiftsSimon Pilgrim2017-05-141-3/+3
* [X86][XOP] Account for cost of extract/insert of 256-bit vector shiftsSimon Pilgrim2017-05-141-12/+12
* [X86][AVX1] Improve 256-bit vector costs for integer unary intrinsics.Simon Pilgrim2017-05-071-16/+16
* [SystemZ] TargetTransformInfo cost functions implemented.Jonas Paulsson2017-04-121-4/+6
* [X86 TTI] Implement LSV hookKeno Fischer2017-04-051-1/+5
* [X86] Add missing BITREVERSE costs for SSE2 vectors and i8/i16/i32/i64 scalarsSimon Pilgrim2017-03-151-0/+19
* Align cost model columns. NFCI.Simon Pilgrim2017-03-151-4/+4
* [TargetTransformInfo] getIntrinsicInstrCost() scalarization estimation improvedJonas Paulsson2017-03-141-4/+5
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