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author | Sanjay Patel <spatel@rotateright.com> | 2017-09-09 13:38:18 +0000 |
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committer | Sanjay Patel <spatel@rotateright.com> | 2017-09-09 13:38:18 +0000 |
commit | 6fd4391ddd0cdaf00e46f512c69cbedb9e8ccfcc (patch) | |
tree | 54f70989ad1c9923fa01daab67993ca01e87917b /llvm/lib/Target/X86/X86TargetTransformInfo.cpp | |
parent | 779b544fa91c41ad2561b1e9c1fd808bd4f61816 (diff) | |
download | bcm5719-llvm-6fd4391ddd0cdaf00e46f512c69cbedb9e8ccfcc.tar.gz bcm5719-llvm-6fd4391ddd0cdaf00e46f512c69cbedb9e8ccfcc.zip |
[DivRempairs] add a pass to optimize div/rem pairs (PR31028)
This is intended to be a superset of the functionality from D31037 (EarlyCSE) but implemented
as an independent pass, so there's no stretching of scope and feature creep for an existing pass.
I also proposed a weaker version of this for SimplifyCFG in D30910. And I initially had almost
this same functionality as an addition to CGP in the motivating example of PR31028:
https://bugs.llvm.org/show_bug.cgi?id=31028
The advantage of positioning this ahead of SimplifyCFG in the pass pipeline is that it can allow
more flattening. But it needs to be after passes (InstCombine) that could sink a div/rem and
undo the hoisting that is done here.
Decomposing remainder may allow removing some code from the backend (PPC and possibly others).
Differential Revision: https://reviews.llvm.org/D37121
llvm-svn: 312862
Diffstat (limited to 'llvm/lib/Target/X86/X86TargetTransformInfo.cpp')
-rw-r--r-- | llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp index 79f192ce062..72ee250a474 100644 --- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp +++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp @@ -2515,6 +2515,11 @@ bool X86TTIImpl::isLegalMaskedScatter(Type *DataType) { return isLegalMaskedGather(DataType); } +bool X86TTIImpl::hasDivRemOp(Type *DataType, bool IsSigned) { + EVT VT = TLI->getValueType(DL, DataType); + return TLI->isOperationLegal(IsSigned ? ISD::SDIVREM : ISD::UDIVREM, VT); +} + bool X86TTIImpl::areInlineCompatible(const Function *Caller, const Function *Callee) const { const TargetMachine &TM = getTLI()->getTargetMachine(); |