summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/X86/X86RegisterInfo.h
Commit message (Expand)AuthorAgeFilesLines
* GlobalISel: Remove unsigned variant of SrcOpMatt Arsenault2019-06-241-3/+3
* CodeGen: Introduce a class for registersMatt Arsenault2019-06-241-1/+1
* Recommit r358887 "[TargetLowering][AMDGPU][X86] Improve SimplifyDemandedBits ...Craig Topper2019-05-131-0/+5
* [X86] Make X86RegisterInfo(const Triple &TT) constructor explicit.Simon Pilgrim2019-05-051-1/+1
* Fix the lowering issue of intrinsics llvm.localaddress on X86Craig Topper2019-02-081-0/+1
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [TargetRegisterInfo] Remove temporary hook enableMultipleCopyHints()Jonas Paulsson2018-10-051-2/+0
* [X86] Handle COPYs of physregs better (regalloc hints)Simon Pilgrim2018-09-191-0/+2
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-1/+1
* X86FrameLowering: Fix getFrameIndexReference() for 'fixed' objectsMatthias Braun2017-04-191-0/+5
* Target: Remove unused entities.Peter Collingbourne2016-10-091-1/+1
* [AVX-512] Replace get512BitSuperRegister with calls to TargetRegisterInfo::ge...Craig Topper2016-09-251-3/+0
* [AVX-512] Teach X86InstrInfo::copyPhysReg to use a 512-bit move if XMM16-XMM3...Craig Topper2016-09-201-0/+3
* [AVX-512] Simplify X86InstrInfo::copyPhysReg for 128/256-bit vectors with AVX...Craig Topper2016-09-051-3/+0
* CXX_FAST_TLS calling convention: performance improvement for x86-64.Manman Ren2016-01-121-0/+2
* [X86] Move getX86SubSuperRegisterOrZero to X86MCTargetDesc.cpp so it can be u...Craig Topper2015-12-251-10/+0
* [X86] Replace MVT::SimpleValueType in the AsmParser library and getX86SubSupe...Craig Topper2015-12-251-3/+3
* findDeadCallerSavedReg needs to pay attention to calling conventionAndy Ayers2015-11-231-0/+5
* [TLS on Darwin] use a different mask for tls calls on x86-64.Manman Ren2015-11-121-0/+4
* [WinEH] Mark funclet entries and exits as clobbering all registersReid Kleckner2015-11-061-1/+1
* Targets: commonize some stack realignment codeJF Bastien2015-07-201-3/+1
* X86: Rework inline asm integer register specification.Matthias Braun2015-06-291-3/+8
* Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)Alexander Kornienko2015-06-231-1/+1
* Fixed/added namespace ending comments using clang-tidy. NFCAlexander Kornienko2015-06-191-1/+1
* [Stackmaps][X86] Remove EFLAGS and IP registers from the live-out mask.Juergen Ributzka2015-06-111-0/+2
* Remove 3 includes from MCInstrDesc.h and explicitly include them where neededPete Cooper2015-05-151-0/+2
* Remove the need to cache the subtarget in the X86 TargetRegisterInfoEric Christopher2015-03-121-6/+1
* Remove some unnecessary forward declarations and put a couple moreEric Christopher2015-03-121-3/+1
* Have getCallPreservedMask and getThisCallPreservedMask take aEric Christopher2015-03-111-1/+2
* Have TargetRegisterInfo::getLargestLegalSuperClass take aEric Christopher2015-03-101-2/+3
* Use 32-bit ebp for NaCl64 in a limited case: llvm.frameaddress.Jan Wen Voung2014-12-051-0/+1
* Canonicalize header guards into a common format.Benjamin Kramer2014-08-131-2/+2
* TargetRegisterInfo: Remove function that fell out of use years ago.Benjamin Kramer2014-07-091-4/+0
* Move X86RegisterInfo away from using the TargetMachine and onlyEric Christopher2014-06-101-3/+3
* [C++] Use 'nullptr'.Craig Topper2014-04-281-1/+1
* Make consistent use of MCPhysReg instead of uint16_t throughout the tree.Craig Topper2014-04-041-1/+1
* [C++11] Mark more classes in the X86 target as 'final'.Craig Topper2014-03-311-1/+1
* x86: getCalleeSavedRegs() would crash on 0 (so don't default to it)Duncan P. N. Exon Smith2014-03-141-1/+1
* [C++11] Add 'override' keyword to virtual methods that override their base cl...Craig Topper2014-03-091-17/+21
* Remove getEHExceptionRegister and getEHHandlerRegister.Rafael Espindola2013-10-071-4/+0
* I'm starting to commit KNL backend. I'll push patches one-by-one. This patch ...Elena Demikhovsky2013-07-241-0/+3
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-071-2/+1
* Move the eliminateCallFramePseudoInstr method from TargetRegisterInfoEli Bendersky2013-02-211-4/+0
* [PEI] Pass the frame index operand number to the eliminateFrameIndex function.Chad Rosier2013-01-311-1/+2
* Add __builtin_setjmp/_longjmp supprt in X86 backendMichael Liao2012-10-151-0/+1
* Add register encoding support in X86 backendMichael Liao2012-10-041-4/+0
* Change getX86SubSuperRegister to take an MVT::SimpleValueType rather than an ...Craig Topper2012-09-301-2/+2
* Add support for dynamic stack realignment in the presence of dynamic allocas onChad Rosier2012-07-101-0/+8
* Temporarily revert r158087.Chandler Carruth2012-06-181-8/+0
* Add support for dynamic stack realignment in the presence of dynamic allocas onChad Rosier2012-06-061-0/+8
OpenPOWER on IntegriCloud