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path: root/llvm/lib/Target/X86/X86InstrInfo.cpp
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* [X86] Add VBLENDPS/VPBLENDD to the execution domain fixing tables.Craig Topper2017-09-031-0/+4
* Mark Knights Landing as having slow two memory operand instructionsCraig Topper2017-08-291-2/+2
* [X86] Add TBM instructions to X86InstrInfo::isDefConvertible.Craig Topper2017-08-251-0/+16
* [X86] Add the rest of the ADC and SBB instructions to isDefConvertible.Craig Topper2017-08-091-6/+10
* [X86] SET0 to use XMM registers where possible PR26018 PR32862Dinar Temirbulatov2017-08-031-8/+13
* [AVX-512] Add unmasked subvector inserts and extract to the execution domain ...Craig Topper2017-07-311-0/+24
* [MachineOutliner] NFC: Change IsTailCall to a call class + frame classJessica Paquette2017-07-291-16/+25
* [MachineOutliner] NFC: Split up getOutliningBenefitJessica Paquette2017-07-281-17/+14
* [X86] SET0 to use XMM registers where possible PR26018 PR32862Dinar Temirbulatov2017-07-271-5/+14
* fix trivial typos in comments; NFCHiroshi Inoue2017-07-031-1/+1
* [AVX-512] Mark masked VPCMP instructions as commutable.Craig Topper2017-06-131-14/+26
* [X86] Add masked integer compare instructions to load folding tables.Craig Topper2017-06-131-0/+58
* [AVX-512] Add VPCONFLICT and VPLZCNT to load folding tables.Craig Topper2017-06-121-0/+36
* [x86] Revert the X86FoldTablesEmitter due to more miscompiles.Chandler Carruth2017-06-061-2/+3398
* Added LLVM_FALLTHROUGH to address warning: this statement may fall through. NFC.Galina Kistanova2017-05-311-0/+1
* Resubmit "[X86] Adding new LLVM TableGen backend that generates the X86 backe...Zachary Turner2017-05-291-3398/+2
* Revert "[X86] Adding new LLVM TableGen backend that generates the X86 backend...Zachary Turner2017-05-291-2/+3398
* [X86] Adding new LLVM TableGen backend that generates the X86 backend memory ...Ayman Musa2017-05-281-3398/+2
* LivePhysRegs: Rework constructor + documentation; NFCMatthias Braun2017-05-261-4/+4
* [X86] Adding vpopcntd and vpopcntq instructionsOren Ben Simhon2017-05-251-0/+6
* Strip trailing whitespace. NFCI.Simon Pilgrim2017-05-241-2/+2
* [Target/X86] Remove unneeded return. NFCI.Davide Italiano2017-05-181-3/+1
* [x86, SSE] AVX1 PR28129 (256-bit all-ones rematerialization)Simon Pilgrim2017-05-131-2/+12
* [X86] Move getX86ConditionCode() from X86FastISel.cpp to X86InstrInfo.cpp. NFCIgor Breger2017-05-111-0/+38
* [X86][LWP] Add stack folding mappings and tests for LWPINS/LWPVAL instructionsSimon Pilgrim2017-05-031-0/+6
* Move value type list from TargetRegisterClass to TargetRegisterInfoKrzysztof Parzyszek2017-04-241-2/+2
* Revert r301231: Accidentally committed stale filesKrzysztof Parzyszek2017-04-241-2/+2
* Move value type list from TargetRegisterClass to TargetRegisterInfoKrzysztof Parzyszek2017-04-241-2/+2
* Move size and alignment information of regclass to TargetRegisterInfoKrzysztof Parzyszek2017-04-241-17/+32
* [X86][MPX] Add load & store instructions of bnd values to getLoadStoreRegOpco...Ayman Musa2017-04-231-22/+30
* Re-commit r301040 "X86: Don't emit zero-byte functions on Windows"Hans Wennborg2017-04-211-1/+1
* Revert r301040 "X86: Don't emit zero-byte functions on Windows"Hans Wennborg2017-04-211-1/+1
* X86: Don't emit zero-byte functions on WindowsHans Wennborg2017-04-211-1/+1
* Use methods to access data stored with frame instructionsSerge Pavlov2017-04-131-11/+6
* Fix the bootstrap failure caused by r299986.Easwaran Raman2017-04-121-0/+4
* [x86] Relax the check in areLoadsFromSameBasePtrEaswaran Raman2017-04-111-19/+16
* [AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registersCraig Topper2017-03-281-22/+0
* ExecutionDepsFix: Normalize names; NFCMatthias Braun2017-03-181-3/+3
* TargetInstrInfo: Provide default implementation of isTailCall().Matthias Braun2017-03-161-22/+0
* [Outliner] Add tail call supportJessica Paquette2017-03-131-17/+58
* [AVX-512] Fix a bad use of a high GR8 register after copying from a mask regi...Craig Topper2017-03-121-0/+2
* [Outliner] Fixed Asan bot failure in r296418Jessica Paquette2017-03-061-0/+80
* Revert "Add MIR-level outlining pass"Matthias Braun2017-02-281-80/+0
* Add MIR-level outlining passMatthias Braun2017-02-281-0/+80
* [X86][AVX] Disable VCVTSS2SD & VCVTSD2SS memory folding and fix the register ...Ayman Musa2017-02-231-4/+0
* [X86][AVX512] Remove VCVTSS2SDZ & VCVTSD2SSZ from memory folding tables as th...Ayman Musa2017-02-231-4/+0
* [X86][AVX512] Change VCVTSS2SD and VCVTSD2SS node types to keep consistency b...Ayman Musa2017-02-231-2/+10
* [AVX-512] Add broadcast VPTERNLOG instructions to special case commuting switch.Craig Topper2017-02-191-13/+37
* [X86][XOP] Reduce the size of a multiclass by moving more stuff to parameters...Craig Topper2017-02-181-4/+4
* Recommit "[X86] Remove XOP VPCMOV intrinsics and autoupgrade them to native IR."Craig Topper2017-02-181-2/+2
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