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path: root/llvm/lib/Target/X86/X86InstrCompiler.td
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* [X86][NFC] Generalize the naming of "Retpoline Thunks" and related code to "I...Scott Constable2020-06-241-8/+8
* [X86] Use TargetConstant for condition code on X86ISD::SETCC/CMOV/BRCOND nodes.Craig Topper2019-09-231-72/+55
* Rename nonvolatile_load/store to simple_load/store [NFC]Philip Reames2019-09-121-6/+6
* Revert [Windows] Disable TrapUnreachable for Win64, add SEH_NoReturnReid Kleckner2019-09-031-3/+0
* [Windows] Disable TrapUnreachable for Win64, add SEH_NoReturnReid Kleckner2019-08-301-0/+3
* [X86] Introduce new MOVSSrm/MOVSDrm opcodes that use VR128 register class.Craig Topper2019-06-181-6/+6
* [X86] Add CMOV_FR32X/CMOV_FR64X pseudo instructions. Use them in fast isel to...Craig Topper2019-05-111-2/+8
* [X86] Put the locked mi8 instrutions above the locked mi/mi32 so they will be...Craig Topper2019-04-141-24/+26
* [X86] Add patterns for using movss/movsd for atomic load/store of f32/64. Rem...Craig Topper2019-04-111-19/+51
* [X86] Use (SUBREG_TO_REG (MOV32rm)) for extloadi64i8/extloadi64i16 when the l...Craig Topper2019-04-071-2/+4
* [X86] Merge the different SETcc instructions for each condition code into sin...Craig Topper2019-04-051-1/+1
* [X86] Merge the different CMOV instructions for each condition code into sing...Craig Topper2019-04-051-27/+13
* [X86] Remove GetLo8XForm and use GetLo32XForm instead. NFCICraig Topper2019-03-251-6/+1
* Revert r356688 "[X86] Don't avoid folding multiple use sign extended 8-bit im...Craig Topper2019-03-251-2/+2
* [X86] Don't avoid folding multiple use sign extended 8-bit immediate into ins...Craig Topper2019-03-211-2/+2
* [X86] Add CMPXCHG8B feature flag. Set it for all CPUs except i386/i486 includ...Craig Topper2019-03-201-3/+4
* [X86] Re-disable cmpxchg16b for 32-bit mode assembly parsing.Craig Topper2019-03-191-2/+2
* [X86] Replace uses of i64immSExt32_su with i64relocImmSExt32_su.Craig Topper2019-03-181-2/+0
* [X86] Make ADD*_DB post-RA pseudos and expand them in expandPostRAPseudo.Craig Topper2019-03-181-1/+1
* [X86] Enable the add with 128 -> sub with -128 encoding trick with X86ISD::AD...Craig Topper2019-03-061-0/+10
* [X86] Enable 8-bit OR with disjoint bits to convert to LEACraig Topper2019-03-051-0/+7
* [X86] Improve detection of unneeded shift amount masking to also handle the c...Craig Topper2019-02-251-47/+50
* [X86] Add a pattern for (i64 (and (anyext def32:), 0x00000000FFFFFFFF)) to pr...Craig Topper2019-01-271-0/+2
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [X86] Change some patterns that select MOVZX16rm8 to instead select MOVZX32rm...Craig Topper2019-01-121-3/+6
* [X86] Remove X86ISD::INC/DEC. Just select them from X86ISD::ADD/SUB at isel timeCraig Topper2019-01-021-44/+64
* [X86] Fix an old FIXME about folding the zero constant into the OR instructio...Craig Topper2018-12-231-5/+4
* [X86] Always use the version of computeKnownBits that returns a value. NFCI.Simon Pilgrim2018-12-211-6/+3
* [X86] Emit SBB instead of SETCC_CARRY from LowerSELECT. Break false dependenc...Craig Topper2018-12-121-0/+15
* [X86] Directly create ADC/SBB nodes instead of using ADD/SUB with (and SETCC_...Craig Topper2018-12-061-24/+0
* Bias physical register immediate assignmentsNirav Dave2018-11-141-2/+2
* [X86] Use a MOVSX instruction instead of a MOVZX instruction in isel for an a...Craig Topper2018-11-101-0/+9
* Revert r345165 "[X86] Bring back the MOV64r0 pseudo instruction"Craig Topper2018-10-311-4/+2
* [ELF] Fix large code model MIR verifier errorsReid Kleckner2018-10-241-5/+0
* [X86] Bring back the MOV64r0 pseudo instructionCraig Topper2018-10-241-2/+4
* [X86] Restore X86ISelDAGToDAG::matchBEXTRFromAnd. Teach address matching to c...Craig Topper2018-10-111-14/+0
* [X86] Stop promoting vector ISD::SELECT to vXi64.Craig Topper2018-10-031-0/+32
* [X86] Add CMOV_VK2/VK4 pseudos and remove lowering code that turned v2i1/v4i1...Craig Topper2018-10-031-0/+2
* [X86] Add CMOV pseudos for VR128X and VR256X register classes. Use them when ...Craig Topper2018-10-031-10/+30
* [X86] Don't break CMOV pseudo instructions down by type. Just by register class.Craig Topper2018-10-031-14/+22
* [X86] Move Atomic binops to use WriteALURMW schedule classSimon Pilgrim2018-10-031-4/+4
* [X86] Move Atomic CMPXCHG to WriteCMPXCHGRMW schedule classSimon Pilgrim2018-10-031-5/+5
* [codeview] Fix 32-bit x86 variable locations in realigned stack framesReid Kleckner2018-10-021-0/+2
* [X86] Fix inline expansion for memset in x32Craig Topper2018-09-221-21/+33
* [X86] Teach X86SelectionDAGInfo::EmitTargetCodeForMemcpy about GNUX32Craig Topper2018-09-121-21/+32
* [x86/retpoline] Split the LLVM concept of retpolines into separateChandler Carruth2018-08-231-6/+6
* [WebAssembly] Add isEHScopeReturn instruction propertyHeejin Ahn2018-08-211-1/+1
* [X86] Remove unnecessary AddedComplexity line. NFCCraig Topper2018-08-121-1/+1
* [X86] Change the MOV32ri64 pseudo instruction to def a GR64 directly instead ...Craig Topper2018-08-111-12/+4
* [SelectionDAG][X86][SystemZ] Add a generic nonvolatile_store/nonvolatile_load...Craig Topper2018-08-071-6/+0
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