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path: root/llvm/lib/Target/X86/X86ISelLowering.cpp
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* [X86ISelLowering] LowerSELECT - remove duplicate value type. NFCI.Simon Pilgrim2019-08-311-2/+0
* [Windows] Disable TrapUnreachable for Win64, add SEH_NoReturnReid Kleckner2019-08-301-0/+12
* [X86] Pass v32i16/v64i8 in zmm registers on KNL target.Craig Topper2019-08-301-0/+15
* [X86][SSE] combinePMULDQ - pmuldq(x, 0) -> zero vector (PR43159)Simon Pilgrim2019-08-291-3/+5
* [X86][CodeGen][NFC] Delay `combineIncDecVector()` from DAGCombine to X86DAGTo...Roman Lebedev2019-08-291-42/+7
* [X86] Add a DAG combine to combine INSERTPS and VBROADCAST of a scalar load. ...Craig Topper2019-08-291-34/+45
* [X86] Make inline assembly 'x' and 'v' constraints work for f128.Craig Topper2019-08-291-2/+3
* [SelectionDAG] Don't generate libcalls for wide shifts on Windows (PR42711)Hans Wennborg2019-08-281-0/+8
* [X86][AVX] Add SimplifyDemandedVectorElts support for KSHIFTL/KSHIFTRSimon Pilgrim2019-08-271-0/+25
* [X86] Delay combineIncDecVector until after op legalization.Craig Topper2019-08-261-5/+15
* [X86] Add a hack to combinePMULDQ to manually turn SIGN_EXTEND_VECTOR_INREG/Z...Craig Topper2019-08-261-0/+28
* [X86][DAGCombiner] Teach narrowShuffle to use concat_vectors instead of inser...Craig Topper2019-08-251-2/+10
* [X86] Add an assert to mark more code that needs to be removed when the vecto...Craig Topper2019-08-241-1/+4
* [X86] Move a transform out of combineConcatVectorOps so we don't prematurely ...Craig Topper2019-08-231-9/+13
* [SelectionDAG][X86] Enable iX SimplifyDemandedBits to vXi1 SimplifyDemandedVe...Craig Topper2019-08-231-0/+20
* Use VT::getHalfNumVectorElementsVT helpers in a few places. NFCI.Simon Pilgrim2019-08-231-5/+2
* [X86] Make combineLoopSADPattern use CONCAT_VECTORS instead of INSERT_SUBVECT...Craig Topper2019-08-231-3/+5
* [X86] Improve lowering of v2i32 SAD handling in combineLoopSADPattern.Craig Topper2019-08-231-3/+10
* [MVT] Add MVT equivalent to EVT::getHalfNumVectorElementsVT() helper. NFCI.Simon Pilgrim2019-08-221-21/+11
* [DAGCombiner][X86] Teach visitCONCAT_VECTORS to combine (concat_vectors (conc...Craig Topper2019-08-201-0/+14
* [X86] Add a DAG combine to transform (i8 (bitcast (v8i1 (extract_subvector (v...Craig Topper2019-08-201-0/+12
* [X86] Use isNullConstant instead of getConstantOperandVal == 0. NFCCraig Topper2019-08-201-2/+2
* [X86] Add back the -x86-experimental-vector-widening-legalization comand line...Craig Topper2019-08-201-130/+1175
* [X86] Teach lowerV4I32Shuffle to only use broadcasts if the mask has more tha...Craig Topper2019-08-191-9/+11
* [X86] Teach lower1BitShuffle to match right shifts with upper zero elements o...Craig Topper2019-08-191-19/+20
* [X86] Fix the lower1BitShuffle code added in r369215 to correctly pass the wi...Craig Topper2019-08-191-1/+1
* [X86] Teach lower1BitShuffle to match KSHIFTR that doesn't use Zeroable and o...Craig Topper2019-08-191-0/+48
* [X86] Teach lower1BitShuffle to recognize padding a subvector with zeros with...Craig Topper2019-08-191-7/+16
* [X86] Add a special case to LowerCONCAT_VECTORSvXi1 to handle concatenating z...Craig Topper2019-08-181-14/+30
* [X86] Replace uses of getZeroVector for vXi1 vectors with DAG.getConstant.Craig Topper2019-08-181-4/+4
* [X86] Improve lower1BitShuffle handling for KSHIFTL on narrow vectors.Craig Topper2019-08-181-8/+24
* Fix signed/unsigned comparison warning. NFCI.Simon Pilgrim2019-08-181-2/+2
* [X86] isTargetShuffleEquivalent - add BUILD_VECTOR matchingSimon Pilgrim2019-08-181-3/+21
* [X86] isTargetShuffleEquivalent - early out on illegal shuffle masks. NFCI.Simon Pilgrim2019-08-181-8/+10
* [X86] Add a one use check to the combineStore code that handles v16i16->v16i8...Craig Topper2019-08-171-1/+1
* Revert [X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle...Jordan Rupprecht2019-08-161-17/+0
* [X86] resolveTargetShuffleInputs - add DemandedElts variant. NFCI.Simon Pilgrim2019-08-161-3/+10
* [X86] combineExtractWithShuffle - handle extract(truncate(x), 0)Simon Pilgrim2019-08-161-1/+11
* Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders2019-08-151-58/+56
* [X86] Add custom type legalization for bitcasting mmx to v2i32/v4i16/v8i8 to ...Craig Topper2019-08-151-0/+10
* [SDAG][x86] check for relaxed math when matching an FP reductionSanjay Patel2019-08-151-2/+2
* [X86] Disable custom type legalization for v2i32/v4i16/v8i8->i64.Craig Topper2019-08-151-2/+1
* [X86] Disable custom type legalization for v2i32/v4i16/v8i8->f64 bitcast.Craig Topper2019-08-151-1/+2
* [X86] Remove some unreachable code from LowerBITCAST.Craig Topper2019-08-151-42/+26
* [X86] Remove some dead code and combine some repeated code that's left.Craig Topper2019-08-151-17/+3
* [X86] Use PSADBW for v8i8 addition reductions.Craig Topper2019-08-141-2/+12
* [X86] XFormVExtractWithShuffleIntoLoad - handle shuffle mask scalingSimon Pilgrim2019-08-131-13/+27
* [X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle using ...Simon Pilgrim2019-08-131-0/+17
* Revert r368276 "[TargetLowering] SimplifyDemandedBits - call SimplifyMultiple...Hans Wennborg2019-08-131-44/+13
* [X86] Allow combineTruncateWithSat to use pack instructions for i16->i8 witho...Craig Topper2019-08-121-1/+2
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