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authorCraig Topper <craig.topper@intel.com>2019-08-15 05:51:50 +0000
committerCraig Topper <craig.topper@intel.com>2019-08-15 05:51:50 +0000
commitba39fcd8c628debb0c86721a78a09ca57b996895 (patch)
treedb75235c011d44215ffa82e80ddc604f7490d118 /llvm/lib/Target/X86/X86ISelLowering.cpp
parent1542ff5282d3941432e7899c3359acd2e6aa992e (diff)
downloadbcm5719-llvm-ba39fcd8c628debb0c86721a78a09ca57b996895.tar.gz
bcm5719-llvm-ba39fcd8c628debb0c86721a78a09ca57b996895.zip
[X86] Remove some unreachable code from LowerBITCAST.
llvm-svn: 368965
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp68
1 files changed, 26 insertions, 42 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index c1655474fd2..735dfd8620f 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -26196,53 +26196,37 @@ static SDValue LowerBITCAST(SDValue Op, const X86Subtarget &Subtarget,
return DAG.getZExtOrTrunc(V, DL, DstVT);
}
- if (SrcVT == MVT::v2i32 || SrcVT == MVT::v4i16 || SrcVT == MVT::v8i8 ||
- SrcVT == MVT::i64) {
- assert(Subtarget.hasSSE2() && "Requires at least SSE2!");
- if (DstVT != MVT::f64 && DstVT != MVT::i64 &&
- !(DstVT == MVT::x86mmx && SrcVT.isVector()))
- // This conversion needs to be expanded.
- return SDValue();
+ assert((SrcVT == MVT::v2i32 || SrcVT == MVT::v4i16 || SrcVT == MVT::v8i8 ||
+ SrcVT == MVT::i64) && "Unexpected VT!");
- SDLoc dl(Op);
- if (SrcVT.isVector()) {
- // Widen the vector in input in the case of MVT::v2i32.
- // Example: from MVT::v2i32 to MVT::v4i32.
- MVT NewVT = MVT::getVectorVT(SrcVT.getVectorElementType(),
- SrcVT.getVectorNumElements() * 2);
- Src = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewVT, Src,
- DAG.getUNDEF(SrcVT));
- } else {
- assert(SrcVT == MVT::i64 && !Subtarget.is64Bit() &&
- "Unexpected source type in LowerBITCAST");
- Src = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64, Src);
- }
+ assert(Subtarget.hasSSE2() && "Requires at least SSE2!");
+ if (DstVT != MVT::f64 && DstVT != MVT::i64 &&
+ !(DstVT == MVT::x86mmx && SrcVT.isVector()))
+ // This conversion needs to be expanded.
+ return SDValue();
- MVT V2X64VT = DstVT == MVT::f64 ? MVT::v2f64 : MVT::v2i64;
- Src = DAG.getNode(ISD::BITCAST, dl, V2X64VT, Src);
+ SDLoc dl(Op);
+ if (SrcVT.isVector()) {
+ // Widen the vector in input in the case of MVT::v2i32.
+ // Example: from MVT::v2i32 to MVT::v4i32.
+ MVT NewVT = MVT::getVectorVT(SrcVT.getVectorElementType(),
+ SrcVT.getVectorNumElements() * 2);
+ Src = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewVT, Src,
+ DAG.getUNDEF(SrcVT));
+ } else {
+ assert(SrcVT == MVT::i64 && !Subtarget.is64Bit() &&
+ "Unexpected source type in LowerBITCAST");
+ Src = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64, Src);
+ }
- if (DstVT == MVT::x86mmx)
- return DAG.getNode(X86ISD::MOVDQ2Q, dl, DstVT, Src);
+ MVT V2X64VT = DstVT == MVT::f64 ? MVT::v2f64 : MVT::v2i64;
+ Src = DAG.getNode(ISD::BITCAST, dl, V2X64VT, Src);
- return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, DstVT, Src,
- DAG.getIntPtrConstant(0, dl));
- }
+ if (DstVT == MVT::x86mmx)
+ return DAG.getNode(X86ISD::MOVDQ2Q, dl, DstVT, Src);
- assert(Subtarget.is64Bit() && !Subtarget.hasSSE2() &&
- Subtarget.hasMMX() && "Unexpected custom BITCAST");
- assert((DstVT == MVT::i64 ||
- (DstVT.isVector() && DstVT.getSizeInBits()==64)) &&
- "Unexpected custom BITCAST");
- // i64 <=> MMX conversions are Legal.
- if (SrcVT==MVT::i64 && DstVT.isVector())
- return Op;
- if (DstVT==MVT::i64 && SrcVT.isVector())
- return Op;
- // MMX <=> MMX conversions are Legal.
- if (SrcVT.isVector() && DstVT.isVector())
- return Op;
- // All other conversions need to be expanded.
- return SDValue();
+ return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, DstVT, Src,
+ DAG.getIntPtrConstant(0, dl));
}
/// Compute the horizontal sum of bytes in V for the elements of VT.
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