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path: root/llvm/lib/Target/X86/X86ISelLowering.cpp
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* [LegalizeDAG][X86] Add support for turning STRICT_FADD/SUB/MUL/DIV into libca...Craig Topper2019-11-211-5/+16
* [X86] Mark vector STRICT_FADD/STRICT_FSUB as Legal and add mutation to X86ISe...Craig Topper2019-11-211-3/+15
* [PGO][PGSO] DAG.shouldOptForSize part.Hiroshi Yamauchi2019-11-211-6/+8
* [X86] Change legalization action for f128 fadd/fsub/fmul/fdiv from Custom to ...Craig Topper2019-11-211-12/+4
* [X86] Fix i16->f128 sitofp to promote the i16 to i32 before trying to form a ...Craig Topper2019-11-201-8/+9
* [X86] Fix f128->i16 fptosi to promote the i16 to i32 before trying to form a ...Craig Topper2019-11-201-15/+16
* [X86] Mark vector STRICT_FP_ROUND as Legal instead of Custom.Craig Topper2019-11-201-3/+9
* [musttail] Don't forward AL on Win64Reid Kleckner2019-11-191-2/+2
* [LegalizeDAG][X86] Enable STRICT_FP_TO_SINT/UINT to be promotedCraig Topper2019-11-191-4/+7
* [X86] Add custom type legalization and lowering for scalar STRICT_FP_TO_SINT/...Craig Topper2019-11-191-29/+117
* DAG: Add function context to isFMAFasterThanFMulAndFAddMatt Arsenault2019-11-191-2/+2
* [X86][SSE] Remove XFormVExtractWithShuffleIntoLoad to prevent legalization in...Simon Pilgrim2019-11-191-122/+2
* [SVE][CodeGen] Scalable vector MVT size queriesGraham Hunter2019-11-181-4/+5
* [X86] Don't set the operation action for i16 SINT_TO_FP to Promote just becau...Craig Topper2019-11-131-3/+9
* [X86] Fix typo in comment. NFCCraig Topper2019-11-131-1/+1
* [X86] Move all the FP_TO_XINT/XINT_TO_FP setOperationActions into the same !u...Craig Topper2019-11-131-41/+28
* [X86] Remove setOperationAction for FP_TO_SINT v8i16.Craig Topper2019-11-121-8/+0
* [X86] Don't consider v64i1 as a legal type unless v64i8 is also a legal type.Craig Topper2019-11-121-25/+47
* [X86] Only pass v64i8/v32i16 as v16i32 on non-avx512bw targets if the v16i32 ...Craig Topper2019-11-121-4/+4
* [X86] Update stale comment. NFCCraig Topper2019-11-111-2/+2
* [X86] Remove setOperationAction lines that say to promote MVT::i1Craig Topper2019-11-111-6/+0
* [X86] Remove some else branches after checking for !useSoftFloat() that set o...Craig Topper2019-11-111-9/+0
* [AArch64][X86] Don't assume __powidf2 is available on Windows.Eli Friedman2019-11-081-0/+6
* [X86] Remove unused variable. NFCCraig Topper2019-11-061-1/+0
* [X86] Remove dead code from combineStore.Craig Topper2019-11-061-44/+10
* [X86] Clamp large constant shift amounts for MMX shift intrinsics to 8-bits.Craig Topper2019-11-061-2/+5
* [X86ISelLowering] Fixed typo in assert. NFCI.Dávid Bolvanský2019-11-061-1/+1
* [x86] avoid crashing when splitting AVX stores with non-simple type (PR43916)Sanjay Patel2019-11-061-3/+5
* [X86] LowerAVXExtend - fix dodgy self-comparison assert.Simon Pilgrim2019-11-061-1/+1
* [X86] Gate select->fmin/fmax transform on NoSignedZeros instead of UnsafeFPMathBenjamin Kramer2019-11-051-8/+7
* [X86/Atomics] (Semantically) revert G246098, switch back to the old atomic ex...Philip Reames2019-11-051-1/+1
* [X86] Specifically limit fmin/fmax commutativity to NoNaNs + NoSignedZerosBenjamin Kramer2019-11-051-2/+3
* [X86] Convert ShrinkMode to scoped enum class. NFCI.Simon Pilgrim2019-11-041-11/+15
* [X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle using ...Simon Pilgrim2019-11-041-0/+17
* [X86][SSE] combineX86ShufflesRecursively - at Depth==0, only resolve KnownZer...Simon Pilgrim2019-11-031-6/+31
* [X86][SSE] combineX86ShufflesRecursively - don't bother merging shuffles with...Simon Pilgrim2019-11-031-92/+105
* Fix uninitialized variable warning. NFCI.Simon Pilgrim2019-11-031-1/+1
* [X86] Move computeZeroableShuffleElements before getTargetShuffleAndZeroables...Simon Pilgrim2019-11-021-87/+87
* [X86] Change the behavior of canWidenShuffleElements used by lowerV2X128Shuff...Craig Topper2019-11-011-19/+14
* [X86][AVX] Add support for and/or scalar bool reduction with AVX512 mask regi...Simon Pilgrim2019-11-011-0/+6
* [X86] isFNEG - use switch() instead of if-else tree. NFCI.Simon Pilgrim2019-11-011-33/+36
* [X86][SSE] Convert computeZeroableShuffleElements to emit KnownUndef and Know...Simon Pilgrim2019-10-311-23/+35
* [X86] Add FIXME comment to merge more of computeZeroableShuffleElements and g...Simon Pilgrim2019-10-301-0/+1
* [X86][SSE] combineX86ShuffleChain - use resolveZeroablesFromTargetShuffle hel...Simon Pilgrim2019-10-301-4/+3
* [X86] combineOrShiftToFunnelShift - use isOperationLegalOrCustom to check FSH...Simon Pilgrim2019-10-301-1/+2
* [X86] combineOrShiftToFunnelShift - use getShiftAmountTy instead of hardwirin...Simon Pilgrim2019-10-301-5/+8
* [Alignment] Use Align for TFI.getStackAlignment() in X86ISelLoweringGuillaume Chatelet2019-10-301-26/+18
* [X86] Make memcmp vector lowering handle arbitrary expansionsDavid Zarzycki2019-10-301-23/+43
* [SelectionDAG] Enable lowering unordered atomics loads w/LoadSDNode (and stor...Philip Reames2019-10-291-1/+1
* [X86] Narrow i64 compares with constant to i32 when the upper 32-bits are kno...Craig Topper2019-10-291-5/+17
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