summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/X86/X86ISelLowering.cpp
Commit message (Expand)AuthorAgeFilesLines
* Use fp unpack instructions to unpack int types. Until we have AVX2, thisBruno Cardoso Lopes2011-08-091-0/+4
* Revert r137114Bruno Cardoso Lopes2011-08-091-21/+1
* Handle sitofp between v4f64 <- v4i32. Fix PR10559Bruno Cardoso Lopes2011-08-091-1/+21
* Make LowerVSETCC aware of AVX types and add patterns to match them.Bruno Cardoso Lopes2011-08-091-3/+10
* Add support for several vector shifts operations while in AVX mode. Fix PR10581Bruno Cardoso Lopes2011-08-081-10/+52
* Fix an obvious type. Patch by Ivan Krasin.Evan Cheng2011-08-041-1/+1
* Only access both operands of an INSERT_SUBVECTOR if it is an INSERT_SUBVECTOR.Bill Wendling2011-08-041-9/+10
* Remove unused variables.Benjamin Kramer2011-08-031-1/+0
* Don't create a ridiculous EXTRACT_ELEMENT. PR10563.Eli Friedman2011-08-021-3/+1
* Make this kind of lowering to be supported by 256-bit instructions:Bruno Cardoso Lopes2011-08-021-14/+24
* Add v4f64 -> v2f32 fp_round support. Also add a testcase to exerciseBruno Cardoso Lopes2011-08-011-0/+1
* Teach PreprocessISelDAG to be aware of vector types and to not process them.Bruno Cardoso Lopes2011-08-011-2/+2
* Lower CONCAT_VECTORS to use two VINSERTF128 instructions instead ofBruno Cardoso Lopes2011-08-011-5/+48
* Since vectors with all ones can't be created with a 256-bit instruction,Bruno Cardoso Lopes2011-08-011-11/+13
* Misc optimizer+codegen work for 'cmpxchg' and 'atomicrmw'. They appear to beEli Friedman2011-07-291-1/+3
* Fix two tests that I crashed in the previous commits. The mask eltsBruno Cardoso Lopes2011-07-291-5/+17
* Match VPERMIL masks more strictly and update the target specific maskBruno Cardoso Lopes2011-07-291-7/+17
* Add DecodeShuffle shuffle support for VPERMIPD variantesBruno Cardoso Lopes2011-07-291-2/+16
* Fix a bug while generating target specific VPERMIL masks: skipBruno Cardoso Lopes2011-07-291-4/+12
* Enable usage of SSE4 extracts and inserts in their 128-bit AVX forms.Bruno Cardoso Lopes2011-07-291-39/+29
* Cleanup PALIGNR handling and remove the old palign pattern fragment.Bruno Cardoso Lopes2011-07-291-6/+2
* Invert the subvector insertion to be more likely to be taken as a COPYBruno Cardoso Lopes2011-07-281-3/+3
* Add SINT_TO_FP and FP_TO_SINT support for v8i32 types. Also moveBruno Cardoso Lopes2011-07-281-0/+3
* Code generation for 'fence' instruction.Eli Friedman2011-07-271-1/+42
* Explicitly cast narrowing conversions inside {}s that will become errors inJeffrey Yasskin2011-07-271-1/+1
* Move some code around to open opportunity for more shuffle matchingBruno Cardoso Lopes2011-07-271-18/+18
* The vpermilps and vpermilpd have different behaviour regarding theBruno Cardoso Lopes2011-07-271-26/+126
* Add a neat little two's complement hack for x86.Benjamin Kramer2011-07-261-3/+30
* Recognize unpckh* masks and match 256-bit versions. The new versions areBruno Cardoso Lopes2011-07-261-32/+59
* Prevent x86-specific DAGCombine from creating nodes with illegal type (which ...Eli Friedman2011-07-261-1/+2
* More movsldup/movshdup cleanup. Rewrite the mask matching function and addBruno Cardoso Lopes2011-07-261-35/+42
* More cleanup, subtarget info isn't used here.Bruno Cardoso Lopes2011-07-261-8/+5
* Codegen allonesvector better while using AVX: vpcmpeqd + vinsertf128Bruno Cardoso Lopes2011-07-251-9/+44
* - Handle special scalar_to_vector case: splats. Using a native 128-bitBruno Cardoso Lopes2011-07-251-1/+39
* Reintroduce r135730, this is indeed the right approach, there is noBruno Cardoso Lopes2011-07-251-0/+18
* Get rid of an incorrect optimization for shuffles with PALIGNR and simplify i...Eli Friedman2011-07-251-15/+5
* Turn shuffles into unpacks for VT == MVT::v2i64 and MVT::v2f64Rafael Espindola2011-07-221-9/+5
* Fix x86's XALUO lowering to return its replacement values insteadDan Gohman2011-07-221-4/+2
* GCC complains about the angle of this line.Benjamin Kramer2011-07-221-1/+1
* Remove the 128-bit special handling from SCALAR_TO_VECTOR. This isn'tBruno Cardoso Lopes2011-07-221-18/+0
* -Inspected a AVX code block added by someone in early Feb. This was never usedBruno Cardoso Lopes2011-07-221-74/+25
* Add a DAGCombine for transforming 128->256 casts into a simpleBruno Cardoso Lopes2011-07-221-7/+61
* Introduce a new function to lower 256-bit vectors which are notBruno Cardoso Lopes2011-07-221-0/+14
* Rename function to be more specific and be more strict about its usageBruno Cardoso Lopes2011-07-221-6/+9
* - Register v16i16 as valid VR256 register classBruno Cardoso Lopes2011-07-211-5/+6
* Add support for 256-bit versions of VPERMIL instruction. This is a newBruno Cardoso Lopes2011-07-211-0/+63
* Improve splat promotion to handle AVX types: v32i8 and v16i16. AlsoBruno Cardoso Lopes2011-07-211-24/+87
* Tidy up codeBruno Cardoso Lopes2011-07-211-15/+5
* Goodbye TargetAsmInfo. This eliminate last bit of CodeGen and Target in llvm-mc.Evan Cheng2011-07-201-5/+2
* Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo downEvan Cheng2011-07-181-3/+3
OpenPOWER on IntegriCloud