| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Fix issues in shuffle decoding around VPERM* instructions. Fix shuffle decodi... | Craig Topper | 2011-11-29 | 1 | -3/+2 |
| * | Add X86 instruction selection for VPERM2I128 when AVX2 is enabled. Merge VPER... | Craig Topper | 2011-11-28 | 1 | -108/+70 |
| * | Make isCommutedVSHUFP more like the way isCommutedSHUFP is handled. | Craig Topper | 2011-11-28 | 1 | -35/+81 |
| * | Merge detecting and handling for VSHUFPSY and VSHUFPDY since a lot of the cod... | Craig Topper | 2011-11-27 | 1 | -92/+39 |
| * | Merge 128-bit and 256-bit X86ISD node types for VPERMILPS and VPERMILPD. Simp... | Craig Topper | 2011-11-26 | 1 | -31/+11 |
| * | Collapse X86ISD node types for PUNPCKH*, PUNPCKL*, UNPCKLP*, and UNPCKHP* to ... | Craig Topper | 2011-11-26 | 1 | -86/+42 |
| * | Remove 256-bit specific node types for UNPCKHPS/D and instead use the 128-bit... | Craig Topper | 2011-11-24 | 1 | -26/+8 |
| * | Remove AVX2 specific X86ISD node types for PUNPCKH/L and instead just reuse t... | Craig Topper | 2011-11-24 | 1 | -48/+8 |
| * | X86: Use btq for bit tests if the immediate can't be encoded in 32 bits. | Benjamin Kramer | 2011-11-23 | 1 | -1/+9 |
| * | I added several lines in X86 code generator that allow to choose | Elena Demikhovsky | 2011-11-23 | 1 | -15/+46 |
| * | Fix shuffle decoding logic to handle UNPCKLPS/UNPCKLPD on 256-bit vectors cor... | Craig Topper | 2011-11-22 | 1 | -1/+1 |
| * | Add methods for querying minimum SSE version along with AVX. Simplifies all t... | Craig Topper | 2011-11-22 | 1 | -43/+34 |
| * | Lowering for v32i8 to VPUNPCKLBW/VPUNPCKHBW when AVX2 is enabled. | Craig Topper | 2011-11-21 | 1 | -2/+14 |
| * | Add support for lowering 256-bit shuffles to VPUNPCKL/H for i16, i32, i64 if ... | Craig Topper | 2011-11-21 | 1 | -33/+87 |
| * | Make LowerSIGN_EXTEND_INREG split 256-bit vectors when AVX1 is enabled and us... | Craig Topper | 2011-11-21 | 1 | -8/+42 |
| * | Add code for lowering v32i8 shifts by a splat to AVX2 immediate shift instruc... | Craig Topper | 2011-11-20 | 1 | -40/+41 |
| * | Use 256-bit vcmpeqd for creating an all ones vector when AVX2 is enabled. | Craig Topper | 2011-11-19 | 1 | -15/+24 |
| * | Custom lower AVX2 variable shift intrinsics to shl/srl/sra nodes and remove t... | Craig Topper | 2011-11-19 | 1 | -0/+17 |
| * | Synthesize SSSE3/AVX 128-bit horizontal integer add/sub instructions from add... | Craig Topper | 2011-11-19 | 1 | -3/+27 |
| * | Collapse X86 PSIGNB/PSIGNW/PSIGND node types. | Craig Topper | 2011-11-19 | 1 | -15/+6 |
| * | Extend VPBLENDVB and VPSIGN lowering to work for AVX2. | Craig Topper | 2011-11-19 | 1 | -81/+88 |
| * | Add AVX2 vpbroadcast support | Nadav Rotem | 2011-11-18 | 1 | -15/+28 |
| * | AVX: Add support for vbroadcast from BUILD_VECTOR and refactor some of the vb... | Nadav Rotem | 2011-11-15 | 1 | -48/+85 |
| * | Added custom lowering for load->dec->store sequence in x86 when the EFLAGS re... | Pete Cooper | 2011-11-15 | 1 | -2/+4 |
| * | Remove some unnecessary includes of PseudoSourceValue.h. | Jay Foad | 2011-11-15 | 1 | -1/+0 |
| * | Changed SSE4/AVX <2 x i64> extract and insert ops to be Custom lowered | Pete Cooper | 2011-11-14 | 1 | -5/+8 |
| * | Add neverHasSideEffects, mayLoad, and mayStore to many patternless SSE/AVX in... | Craig Topper | 2011-11-14 | 1 | -5/+2 |
| * | Add BLSI, BLSMSK, and BLSR to getTargetNodeName. | Craig Topper | 2011-11-13 | 1 | -2/+6 |
| * | Add more AVX2 shift lowering support. Move AVX2 variable shift to use pattern... | Craig Topper | 2011-11-12 | 1 | -62/+104 |
| * | Add lowering for AVX2 shift instructions. | Craig Topper | 2011-11-11 | 1 | -54/+131 |
| * | AVX2: Add patterns for variable shift operations | Nadav Rotem | 2011-11-09 | 1 | -0/+12 |
| * | Add AVX2 support for vselect of v32i8 | Nadav Rotem | 2011-11-09 | 1 | -0/+2 |
| * | Add instruction selection for AVX2 integer comparisons. | Craig Topper | 2011-11-09 | 1 | -8/+7 |
| * | Add AVX2 instruction lowering for add, sub, and mul. | Craig Topper | 2011-11-09 | 1 | -24/+81 |
| * | Added invariant field to the DAG.getLoad method and changed all calls. | Pete Cooper | 2011-11-08 | 1 | -33/+41 |
| * | Add x86 isel logic and patterns to match movlps from clang generated IR for _... | Evan Cheng | 2011-11-08 | 1 | -6/+5 |
| * | Reapply r143206, with fixes. Disallow physical register lifetimes | Dan Gohman | 2011-11-03 | 1 | -10/+184 |
| * | Teach the x86 backend a couple tricks for dealing with v16i8 sra by a constan... | Eli Friedman | 2011-11-01 | 1 | -0/+18 |
| * | X86: Emit logical shift by constant splat of <16 x i8> as a <8 x i16> shift a... | Benjamin Kramer | 2011-10-30 | 1 | -0/+26 |
| * | Fix pr11266. | Nadav Rotem | 2011-10-30 | 1 | -4/+22 |
| * | Revert r143206, as there are still some failing tests. | Dan Gohman | 2011-10-29 | 1 | -184/+10 |
| * | Reapply r143177 and r143179 (reverting r143188), with scheduler | Dan Gohman | 2011-10-28 | 1 | -10/+184 |
| * | Speculatively disable Dan's commits 143177 and 143179 to see if | Duncan Sands | 2011-10-28 | 1 | -184/+10 |
| * | Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUW | Dan Gohman | 2011-10-28 | 1 | -10/+184 |
| * | Rename NonScalarIntSafe to something more appropriate. | Lang Hames | 2011-10-26 | 1 | -3/+3 |
| * | Fixes an issue reported by -verify-machineinstrs. | Rafael Espindola | 2011-10-26 | 1 | -4/+5 |
| * | Fix pr11193. | Nadav Rotem | 2011-10-22 | 1 | -3/+0 |
| * | Remove intrinsics for X86 BLSI, BLSMSK, and BLSR intrinsics and replace with ... | Craig Topper | 2011-10-21 | 1 | -1/+53 |
| * | Fix TLS lowering bug. The CopyFromReg must be glued to the TLSCALL. rdar://10... | Evan Cheng | 2011-10-19 | 1 | -1/+2 |
| * | Fix a bunch of unused variable warnings when doing a release | Duncan Sands | 2011-10-18 | 1 | -2/+3 |
