| Commit message (Expand) | Author | Age | Files | Lines |
| * | [X86] Fix a mistake in the X86ISelDAGToDAG.cpp code for MUL8r/IMUL8r. | Craig Topper | 2017-10-28 | 1 | -1/+1 |
| * | [X86] Improve handling of UDIVREM8_ZEXT_HREG/SDIVREM8_SEXT_HREG to support 64... | Craig Topper | 2017-10-26 | 1 | -13/+1 |
| * | Reverting r315590; it did not include changes for llvm-tblgen, which is causi... | Aaron Ballman | 2017-10-15 | 1 | -1/+1 |
| * | [dump] Remove NDEBUG from test to enable dump methods [NFC] | Don Hinton | 2017-10-12 | 1 | -1/+1 |
| * | [X86] Simplify some code in getInsertVINSERTImmediate and getExtractVEXTRACTI... | Craig Topper | 2017-10-08 | 1 | -4/+2 |
| * | Revert r314886 "[X86] Improvement in CodeGen instruction selection for LEAs (... | Hans Wennborg | 2017-10-04 | 1 | -79/+6 |
| * | [X86] Improvement in CodeGen instruction selection for LEAs (re-applying post... | Jatin Bhateja | 2017-10-04 | 1 | -6/+79 |
| * | [X86] Don't select (cmp (and, imm), 0) to testw | Craig Topper | 2017-09-28 | 1 | -1/+4 |
| * | [X86] Remove dead code from X86ISelDAGToDAG.cpp multiply handling | Craig Topper | 2017-09-28 | 1 | -1/+1 |
| * | [AVX-512] Replace large number of explicit patterns that check for insert_sub... | Craig Topper | 2017-09-25 | 1 | -0/+35 |
| * | [X86] Move the getInsertVINSERTImmediate and getExtractVEXTRACTImmediate help... | Craig Topper | 2017-09-23 | 1 | -0/+18 |
| * | [X86] Convert X86ISD::SELECT to ISD::VSELECT just before instruction selectio... | Craig Topper | 2017-09-19 | 1 | -1/+2 |
| * | [X86] Don't emit COPY_TO_REG to ABCD registers before EXTRACT_SUBREG of sub_8bit | Craig Topper | 2017-09-18 | 1 | -13/+0 |
| * | [X86] Don't emit COPY_TO_REG to ABCD registers before EXTRACT_SUBREG of sub_8... | Craig Topper | 2017-09-18 | 1 | -12/+0 |
| * | Revert r313343 "[X86] PR32755 : Improvement in CodeGen instruction selection ... | Hans Wennborg | 2017-09-15 | 1 | -79/+6 |
| * | [X86] PR32755 : Improvement in CodeGen instruction selection for LEAs. | Jatin Bhateja | 2017-09-15 | 1 | -6/+79 |
| * | [X86] Make sure we emit a SUBREG_TO_REG after the MOV32ri when creating a BEX... | Craig Topper | 2017-09-13 | 1 | -2/+9 |
| * | [X86] Use isUInt<32> to simplify some code. NFC | Craig Topper | 2017-09-13 | 1 | -1/+1 |
| * | [X86] Move matching of (and (srl/sra, C), (1<<C) - 1) to BEXTR/BEXTRI instruc... | Craig Topper | 2017-09-12 | 1 | -0/+92 |
| * | [X86] Call removeDeadNode when we're done doing custom isel for mul, div and ... | Craig Topper | 2017-09-09 | 1 | -0/+6 |
| * | [X86] Use ReplaceNode instead of ReplaceUses when converting X86ISD::SHRUNKBL... | Craig Topper | 2017-09-09 | 1 | -1/+1 |
| * | [x86] Fix GCC pedantic warnings about default arguments for lambdas. | Chandler Carruth | 2017-09-08 | 1 | -6/+6 |
| * | [x86] Flesh out the custom ISel for RMW aritmetic ops with used flags to | Chandler Carruth | 2017-09-08 | 1 | -2/+32 |
| * | [x86] Extend the manual ISel of `add` and `sub` with both RMW memory | Chandler Carruth | 2017-09-07 | 1 | -15/+142 |
| * | Mark Knights Landing as having slow two memory operand instructions | Craig Topper | 2017-08-29 | 1 | -1/+1 |
| * | [x86] Teach the backend to fold more read-modify-write memory operands | Chandler Carruth | 2017-08-25 | 1 | -53/+73 |
| * | [X86] Use SDValue::getOpcode instead of calling getNode and calling getOpcode... | Craig Topper | 2017-08-25 | 1 | -2/+2 |
| * | [X86] Use isUInt and isShiftedUInt instead of using our own masking and compa... | Craig Topper | 2017-08-25 | 1 | -21/+13 |
| * | [x86] NFC: More refactoring to pave the way to extending this ISel logic | Chandler Carruth | 2017-08-25 | 1 | -36/+51 |
| * | [x86] NFC - Refactor the custom lowering of `(load; op; store)` RMW sequences. | Chandler Carruth | 2017-08-25 | 1 | -49/+57 |
| * | [X86] When selecting sse_load_f32/f64 pattern, make sure there's only one use... | Craig Topper | 2017-08-21 | 1 | -4/+22 |
| * | [X86] Merge all of the vecload and alignedload predicates into single predica... | Craig Topper | 2017-08-19 | 1 | -0/+21 |
| * | [X86] Don't try to scale down if that exceeds the bitwidth. | Davide Italiano | 2017-07-19 | 1 | -1/+4 |
| * | AVX-512: Lowering Masked Gather intrinsic - fixed a bug | Elena Demikhovsky | 2017-06-22 | 1 | -7/+21 |
| * | Remove ADDC, ADDE, SUBC, SUBE and SETCCE support from the X86 backend, use th... | Amaury Sechet | 2017-06-01 | 1 | -2/+0 |
| * | Use SDValue::getOperand() helper. NFCI. | Simon Pilgrim | 2017-05-12 | 1 | -22/+19 |
| * | Do not legalize large add with addc/adde, introduce addcarry and do it with u... | Amaury Sechet | 2017-04-30 | 1 | -0/+1 |
| * | [SelectionDAG] Use KnownBits struct in DAG's computeKnownBits and simplifyDem... | Craig Topper | 2017-04-28 | 1 | -3/+4 |
| * | Fix use-after-frees on memory allocated in a Recycler. | Benjamin Kramer | 2017-04-20 | 1 | -2/+3 |
| * | [X86] Fix Stale SDNode use in X86ISelDAGtoDAG | Nirav Dave | 2017-03-23 | 1 | -2/+2 |
| * | [X86] Lower AVX2 gather intrinsics similar to AVX-512. Apply the same input s... | Craig Topper | 2017-03-13 | 1 | -83/+0 |
| * | [Fuchsia] Use thread-pointer ABI slots for stack-protector and safe-stack | Petr Hosek | 2017-02-24 | 1 | -1/+2 |
| * | Disable TLS for stack protector on Android API<17. | Evgeniy Stepanov | 2017-02-23 | 1 | -1/+1 |
| * | X86: Introduce relocImm-based patterns for cmp. | Peter Collingbourne | 2017-02-09 | 1 | -0/+25 |
| * | [X86,ISEL] Fix X86 increment chain dependence calculation | Nirav Dave | 2017-02-02 | 1 | -0/+2 |
| * | X86: Remove dead code. NFC. | Peter Collingbourne | 2017-01-11 | 1 | -10/+0 |
| * | [X86] When recognizing vector loads or VZEXT_LOAD in selectScalarSSELoad make... | Craig Topper | 2016-12-19 | 1 | -2/+2 |
| * | [X86] Teach selectScalarSSELoad to accept full 128-bit vector loads and the X... | Craig Topper | 2016-12-12 | 1 | -0/+22 |
| * | IR, X86: Understand !absolute_symbol metadata on global variables. | Peter Collingbourne | 2016-12-08 | 1 | -2/+40 |
| * | [X86] Remove hasOneUse check that is redundant with the one in IsProfitableTo... | Craig Topper | 2016-11-26 | 1 | -2/+0 |