| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
| |
llvm-svn: 128826
|
|
|
|
|
|
|
|
|
| |
the add/or xform. The JIT isn't mcized yet, boo.
This fixes Olden/voronoi, bh and a ton of other stuff that
uses the jit.
llvm-svn: 116125
|
|
|
|
| |
llvm-svn: 116124
|
|
|
|
| |
llvm-svn: 111835
|
|
|
|
|
|
|
|
| |
- Do not clobber al during variadic calls, this is AMD64 ABI-only feature
- Emit wincall64, where necessary
Patch by Cameron Esfahani!
llvm-svn: 111289
|
|
|
|
| |
llvm-svn: 111001
|
|
|
|
| |
llvm-svn: 111000
|
|
|
|
| |
llvm-svn: 110460
|
|
|
|
| |
llvm-svn: 110410
|
|
|
|
|
|
|
|
| |
address of the static
ID member as the sole unique type identifier. Clean up APIs related to this change.
llvm-svn: 110396
|
|
|
|
| |
llvm-svn: 110371
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
rip out the implementation of X86InstrInfo::GetInstSizeInBytes.
The code being ripped out just implemented a copy and hacked up
version of the (old) instruction encoder, and is buggy and
terrible in other ways. Since "GetInstSizeInBytes" is really
only there to support the JIT's "NeedsExactSize" hook (which
noone is using), just rip out the code. I will rip out the
NeedsExactSize hook next.
This resolves rdar://7617809 - switch X86InstrInfo::GetInstSizeInBytes to use X86MCCodeEmitter
llvm-svn: 109149
|
|
|
|
|
|
| |
thus is a much more meaningful name.
llvm-svn: 108563
|
|
|
|
|
|
|
|
|
| |
pass that inserted it.
It is no longer necessary to limit the live ranges of FP registers to a single
basic block.
llvm-svn: 108536
|
|
|
|
|
|
|
|
|
|
|
| |
like all other instructions, even though a segment is not
allowed. This resolves a bunch of gross hacks in the
encoder and makes LEA more consistent with the rest of the
instruction set.
No functionality change.
llvm-svn: 107934
|
|
|
|
|
|
| |
X86 memory operand.
llvm-svn: 107925
|
|
|
|
| |
llvm-svn: 106542
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
fixes a bug (<rdar://problem/7880900>) in the JIT. This code wouldn't work:
target triple = "x86_64-apple-darwin"
define double @func(double %a) {
%tmp1 = fmul double %a, 5.000000e-01 ; <double> [#uses=1]
ret double %tmp1
}
define i32 @main() nounwind {
%1 = call double @func(double 4.770000e-04) ; <i64> [#uses=0]
ret i32 0
}
llvm-svn: 101965
|
|
|
|
| |
llvm-svn: 101334
|
|
|
|
| |
llvm-svn: 100709
|
|
|
|
|
|
| |
with an MCSymbol instead of an immediate.
llvm-svn: 98481
|
|
|
|
| |
llvm-svn: 98474
|
|
|
|
|
|
|
|
| |
an MCSymbol. Make the EH_LABEL MachineInstr hold its label
with an MCSymbol instead of ID. Fix a bug in MMI.cpp which
would return labels named "Label4" instead of "label4".
llvm-svn: 98463
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
instead of label ID's. This cleans up and regularizes a bunch
of code and makes way for future progress.
Unfortunately, this pointed out to me that JITDwarfEmitter.cpp
is largely copy and paste from DwarfException/MachineModuleInfo
and other places. This is very sad and disturbing. :(
One major change here is that TidyLandingPads moved from being
called in DwarfException::BeginFunction to being called in
DwarfException::EndFunction. There should not be any
functionality change from doing this, but I'm not an EH expert.
llvm-svn: 98459
|
|
|
|
|
|
|
| |
We still have the templated X86 JIT emitter, *and* the
almost-copy in X86InstrInfo for getting instruction sizes.
llvm-svn: 96059
|
|
|
|
|
|
| |
encoder and decoder by using new MRM_ forms.
llvm-svn: 96048
|
|
|
|
| |
llvm-svn: 96038
|
|
|
|
|
|
|
| |
This will work better for the disassembler for modeling things
like lfence/monitor/vmcall etc.
llvm-svn: 95960
|
|
|
|
|
|
| |
fixes the remaining x86-64 jit failures afaik.
llvm-svn: 95867
|
|
|
|
|
|
|
|
|
| |
r12b, etc) also encodes to a R/M value of 4, which is just
as illegal as ESP/RSP for the non-sib version an address.
This fixes x86-64 jit miscompilations of a bunch of programs.
llvm-svn: 95866
|
|
|
|
|
|
| |
MCInst it came from.
llvm-svn: 95767
|
|
|
|
|
|
| |
MCCodeEmitter.
llvm-svn: 95709
|
|
|
|
|
|
| |
MCCodeEmitter.
llvm-svn: 95708
|
|
|
|
|
|
|
|
| |
in X86-32 mode. This is still required in x86-64 mode to avoid
forming [disp+rip] encoding. Rewrite the SIB byte decision logic
to be actually understandable.
llvm-svn: 95693
|
|
|
|
|
|
| |
a confusing idiom to check for ESP or RSP.
llvm-svn: 95690
|
|
|
|
| |
llvm-svn: 95689
|
|
|
|
|
|
|
|
|
| |
into TargetOpcodes.h. #include the new TargetOpcodes.h
into MachineInstr. Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the
codebase.
llvm-svn: 95687
|
|
|
|
| |
llvm-svn: 95438
|
|
|
|
| |
llvm-svn: 95410
|
|
|
|
|
|
| |
TSFlags directly instead of a TargetInstrDesc.
llvm-svn: 95405
|
|
|
|
|
|
|
|
|
|
| |
pushl %ebp
movl %esp, %ebp
movl $42, %eax
popl %ebp
ret
llvm-svn: 95344
|
|
|
|
|
|
|
|
|
| |
Instruction selection for X86 now can choose an instruction
sequence that will fit any address of any symbol, no matter
the pointer width. X86-64 uses a mov+call-via-reg sequence
for this.
llvm-svn: 95323
|
|
|
|
|
|
|
|
| |
instructions with no operands. It can now handle
define void @test2() nounwind { ret void }
llvm-svn: 95261
|
|
|
|
|
|
| |
-enable-new-x86-encoder until its stable.
llvm-svn: 95256
|
|
|
|
| |
llvm-svn: 95254
|
|
|
|
| |
llvm-svn: 95144
|
|
|
|
|
|
|
| |
MCMachineInstr. This also fixes handling of tied registers for MRMSrcMem
instructions.
llvm-svn: 95136
|
|
|
|
|
|
|
|
| |
MachineFunctionAnalysis dole them out, instead of having
AsmPrinter do both. Have the AsmPrinter::SetupMachineFunction
method set the 'AsmPrinter::MF' variable.
llvm-svn: 94509
|
|
|
|
| |
llvm-svn: 92644
|
|
|
|
|
|
|
|
| |
Note that "hasDotLocAndDotFile"-style debug info was already broken;
people wanting this functionality should implement it in the
AsmPrinter/DwarfWriter code.
llvm-svn: 89711
|