diff options
| author | Chris Lattner <sabre@nondot.org> | 2010-02-11 08:45:56 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-02-11 08:45:56 +0000 |
| commit | fbf1f02fee7c99f7e932852c89f3f871c8cdf4c7 (patch) | |
| tree | 417f403a66009bfbf443d010a2889aedd15f3f42 /llvm/lib/Target/X86/X86CodeEmitter.cpp | |
| parent | 5a4ec879bfe6116dceed6b7782496b37a71571b7 (diff) | |
| download | bcm5719-llvm-fbf1f02fee7c99f7e932852c89f3f871c8cdf4c7.tar.gz bcm5719-llvm-fbf1f02fee7c99f7e932852c89f3f871c8cdf4c7.zip | |
dont' call getX86RegNum on X86::RIP, it doesn't like that. This
fixes the remaining x86-64 jit failures afaik.
llvm-svn: 95867
Diffstat (limited to 'llvm/lib/Target/X86/X86CodeEmitter.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86CodeEmitter.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86CodeEmitter.cpp b/llvm/lib/Target/X86/X86CodeEmitter.cpp index bcf3f15d423..6d5fa8da0d8 100644 --- a/llvm/lib/Target/X86/X86CodeEmitter.cpp +++ b/llvm/lib/Target/X86/X86CodeEmitter.cpp @@ -387,7 +387,9 @@ void Emitter<CodeEmitter>::emitMemModRMByte(const MachineInstr &MI, // If no BaseReg, issue a RIP relative instruction only if the MCE can // resolve addresses on-the-fly, otherwise use SIB (Intel Manual 2A, table // 2-7) and absolute references. - unsigned BaseRegNo = BaseReg != 0 ? getX86RegNum(BaseReg) : -1U; + unsigned BaseRegNo = -1U; + if (BaseReg != 0 && BaseReg != X86::RIP) + BaseRegNo = getX86RegNum(BaseReg); if (// The SIB byte must be used if there is an index register. IndexReg.getReg() == 0 && |
