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| author | Chris Lattner <sabre@nondot.org> | 2010-04-07 22:58:41 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-04-07 22:58:41 +0000 |
| commit | 2104b8d36e10b07ee396dba0a6ce58e621ef88c9 (patch) | |
| tree | b2f56fa2c068df5023c81c5781bd3cebdfa371fd /llvm/lib/Target/X86/X86CodeEmitter.cpp | |
| parent | 4b73cfabac29092070ec658b51953a42b9eed8df (diff) | |
| download | bcm5719-llvm-2104b8d36e10b07ee396dba0a6ce58e621ef88c9.tar.gz bcm5719-llvm-2104b8d36e10b07ee396dba0a6ce58e621ef88c9.zip | |
rename llvm::llvm_report_error -> llvm::report_fatal_error
llvm-svn: 100709
Diffstat (limited to 'llvm/lib/Target/X86/X86CodeEmitter.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86CodeEmitter.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86CodeEmitter.cpp b/llvm/lib/Target/X86/X86CodeEmitter.cpp index 6638e110f4f..eaca90ac55f 100644 --- a/llvm/lib/Target/X86/X86CodeEmitter.cpp +++ b/llvm/lib/Target/X86/X86CodeEmitter.cpp @@ -600,7 +600,7 @@ void Emitter<CodeEmitter>::emitInstruction(const MachineInstr &MI, // We allow inline assembler nodes with empty bodies - they can // implicitly define registers, which is ok for JIT. if (MI.getOperand(0).getSymbolName()[0]) - llvm_report_error("JIT does not support inline asm!"); + report_fatal_error("JIT does not support inline asm!"); break; case TargetOpcode::DBG_LABEL: case TargetOpcode::GC_LABEL: |
