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authorChris Lattner <sabre@nondot.org>2010-07-08 23:46:44 +0000
committerChris Lattner <sabre@nondot.org>2010-07-08 23:46:44 +0000
commitf469307c77637ddbbf6b7167b9d31cb20f39a040 (patch)
tree638f23bd62e727da11e9b95b9d86e8f903f53107 /llvm/lib/Target/X86/X86CodeEmitter.cpp
parent45879695553e4fcf007227eba100d3b4b366d477 (diff)
downloadbcm5719-llvm-f469307c77637ddbbf6b7167b9d31cb20f39a040.tar.gz
bcm5719-llvm-f469307c77637ddbbf6b7167b9d31cb20f39a040.zip
Change LEA to have 5 operands for its memory operand, just
like all other instructions, even though a segment is not allowed. This resolves a bunch of gross hacks in the encoder and makes LEA more consistent with the rest of the instruction set. No functionality change. llvm-svn: 107934
Diffstat (limited to 'llvm/lib/Target/X86/X86CodeEmitter.cpp')
-rw-r--r--llvm/lib/Target/X86/X86CodeEmitter.cpp8
1 files changed, 1 insertions, 7 deletions
diff --git a/llvm/lib/Target/X86/X86CodeEmitter.cpp b/llvm/lib/Target/X86/X86CodeEmitter.cpp
index d6aacd7b1f0..f13669bd741 100644
--- a/llvm/lib/Target/X86/X86CodeEmitter.cpp
+++ b/llvm/lib/Target/X86/X86CodeEmitter.cpp
@@ -750,13 +750,7 @@ void Emitter<CodeEmitter>::emitInstruction(const MachineInstr &MI,
break;
case X86II::MRMSrcMem: {
- // FIXME: Maybe lea should have its own form?
- int AddrOperands;
- if (Opcode == X86::LEA64r || Opcode == X86::LEA64_32r ||
- Opcode == X86::LEA16r || Opcode == X86::LEA32r)
- AddrOperands = X86::AddrNumOperands - 1; // No segment register
- else
- AddrOperands = X86::AddrNumOperands;
+ int AddrOperands = X86::AddrNumOperands;
intptr_t PCAdj = (CurOp + AddrOperands + 1 != NumOps) ?
X86II::getSizeOfImm(Desc->TSFlags) : 0;
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