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* Remove this file. It was inadvertently added because I could not findReid Spencer2007-01-121-40/+0
| | | | | | TargetLowering.cpp in CodeGen/SelectionDAG (location makes no sense to me) llvm-svn: 33160
* Add a new home for TargetLowering member functions.Reid Spencer2007-01-121-0/+40
| | | | llvm-svn: 33152
* Add some adviceChris Lattner2006-07-271-1618/+0
| | | | llvm-svn: 29324
* Fix a typo that causes 2006-07-07-ComputeMaskedBits.ll to fail.Evan Cheng2006-07-071-1/+1
| | | | llvm-svn: 29072
* Port some bugfixes in shift handling from SimplifyDemandedBits over toChris Lattner2006-06-131-35/+51
| | | | | | | ComputeMaskedBits. DemandedMasks and KnownZero/One masks should never have bits set out of the range of the base datatype. llvm-svn: 28768
* TargetLowering::ComputeMaskedBits was not clearing reciprocal bits on shifts.Jim Laskey2006-06-131-6/+11
| | | | llvm-svn: 28765
* Start on my todo listAndrew Lenharth2006-06-121-2/+2
| | | | llvm-svn: 28752
* Another typo. Pointed out by Nate Begeman.Evan Cheng2006-05-171-1/+1
| | | | llvm-svn: 28353
* Fix an obvious bug in getPackedTypeBreakdown. Return 1 if type is legal.Evan Cheng2006-05-171-2/+2
| | | | llvm-svn: 28351
* this should be 128 I thinkAndrew Lenharth2006-05-161-1/+1
| | | | llvm-svn: 28330
* Move this code to a common placeAndrew Lenharth2006-05-161-0/+265
| | | | llvm-svn: 28329
* Refactor a bunch of includes so that TargetMachine.h doesn't have to includeOwen Anderson2006-05-121-0/+1
| | | | | | | TargetData.h. This should make recompiles a bit faster with my current TargetData tinkering. llvm-svn: 28238
* When tracking demanded bits, if any bits from the sext of an SRA are demanded,Chris Lattner2006-05-081-2/+8
| | | | | | then so is the input sign bit. This fixes mediabench/g721 on X86. llvm-svn: 28166
* Use ComputeMaskedBits to determine # sign bits as a fallback. This allows usChris Lattner2006-05-061-2/+23
| | | | | | | to handle all kinds of stuff, including silly things like: sextinreg(setcc,i16) -> setcc. llvm-svn: 28155
* Add some more sign propagation casesChris Lattner2006-05-061-10/+77
| | | | llvm-svn: 28154
* Add some more simple sign bit propagation cases.Chris Lattner2006-05-061-27/+67
| | | | llvm-svn: 28149
* Add some really really simple code for computing sign-bit propagation.Chris Lattner2006-05-061-0/+95
| | | | | | This will certainly be enhanced in the future. llvm-svn: 28145
* Fold (trunc (srl x, c)) -> (srl (trunc x), c)Chris Lattner2006-05-061-0/+32
| | | | llvm-svn: 28138
* Implement ComputeMaskedBits/SimplifyDemandedBits for ISD::TRUNCATEChris Lattner2006-05-051-0/+18
| | | | llvm-svn: 28135
* Refactor TargetMachine, pushing handling of TargetData into the ↵Owen Anderson2006-05-031-2/+2
| | | | | | | | target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference. This fixes PR 759. llvm-svn: 28074
* relax assertionChris Lattner2006-04-021-1/+4
| | | | llvm-svn: 27358
* Allow targets to compute masked bits for intrinsics.Chris Lattner2006-04-021-4/+9
| | | | llvm-svn: 27357
* Was returning the wrong type.Chris Lattner2006-03-311-4/+5
| | | | llvm-svn: 27277
* Modify the TargetLowering::getPackedTypeBreakdown method to also return theChris Lattner2006-03-311-4/+7
| | | | | | unpromoted element type. llvm-svn: 27273
* Implement TargetLowering::getPackedTypeBreakdownChris Lattner2006-03-311-0/+41
| | | | llvm-svn: 27270
* TypoEvan Cheng2006-03-231-1/+1
| | | | llvm-svn: 27008
* set TransformToType correctly for vector types.Chris Lattner2006-03-161-0/+8
| | | | llvm-svn: 26797
* Add LSR hooks.Evan Cheng2006-03-131-0/+13
| | | | llvm-svn: 26740
* I can't convince myself that this is safe, remove the recursive call.Chris Lattner2006-03-131-18/+2
| | | | llvm-svn: 26725
* Do not fold (add (shl x, c1), (shl c2, c1)) -> (shl (add x, c2), c1),Chris Lattner2006-03-051-18/+0
| | | | | | we want to canonicalize the other way. llvm-svn: 26547
* Number of NodeTypes now exceeds 128.Evan Cheng2006-03-031-1/+1
| | | | llvm-svn: 26503
* Add interfaces for targets to provide target-specific dag combiner ↵Chris Lattner2006-03-011-0/+8
| | | | | | optimizations. llvm-svn: 26442
* Implement bit propagation through sub nodes, this (re)implementsChris Lattner2006-02-271-3/+29
| | | | | | PowerPC/div-2.ll llvm-svn: 26392
* Check RHS simplification before LHS simplification to avoid infinitely loopingChris Lattner2006-02-271-18/+17
| | | | | | on PowerPC/small-arguments.ll llvm-svn: 26389
* Just like we use the RHS of an AND to simplify the LHS, use the LHS toChris Lattner2006-02-271-0/+17
| | | | | | | | | | | | | | | | | | | | | simplify the RHS. This allows for the elimination of many thousands of ands from multisource, and compiles CodeGen/PowerPC/and-elim.ll:test2 into this: _test2: srwi r2, r3, 1 xori r3, r2, 40961 blr instead of this: _test2: rlwinm r2, r3, 31, 17, 31 xori r2, r2, 40961 rlwinm r3, r2, 0, 16, 31 blr llvm-svn: 26388
* Add a bunch of missed cases. Perhaps the most significant of which is thatChris Lattner2006-02-261-40/+206
| | | | | | assertzext produces zero bits. llvm-svn: 26386
* Recognize memory operand codesChris Lattner2006-02-241-1/+6
| | | | llvm-svn: 26345
* Don't return registers from register classes that aren't legal.Chris Lattner2006-02-221-2/+15
| | | | llvm-svn: 26317
* split register class handling from explicit physreg handling.Chris Lattner2006-02-221-11/+21
| | | | llvm-svn: 26308
* Updates to match change of getRegForInlineAsmConstraint prototypeChris Lattner2006-02-211-1/+2
| | | | llvm-svn: 26305
* Add a fold for add that exchanges it with a constant shift if possible, soNate Begeman2006-02-181-6/+24
| | | | | | that the shift may be more easily folded into other operations. llvm-svn: 26286
* Fix bug noticed by VC++.Jeff Cohen2006-02-171-2/+2
| | | | llvm-svn: 26252
* Rework the SelectionDAG-based implementations of SimplifyDemandedBitsNate Begeman2006-02-161-122/+506
| | | | | | | and ComputeMaskedBits to match the new improved versions in instcombine. Tested against all of multisource/benchmarks on ppc. llvm-svn: 26238
* Rename maxStoresPerMemSet to maxStoresPerMemset, etc.Evan Cheng2006-02-141-1/+1
| | | | llvm-svn: 26174
* implementation of some methods for inlineasmChris Lattner2006-02-041-1/+41
| | | | llvm-svn: 25951
* Implement some feedback from sabreNate Begeman2006-02-031-5/+5
| | | | llvm-svn: 25946
* Add a framework for eliminating instructions that produces undemanded bits.Nate Begeman2006-02-031-1/+57
| | | | llvm-svn: 25945
* Implement MaskedValueIsZero for ANY_EXTEND nodesChris Lattner2006-02-021-0/+5
| | | | llvm-svn: 25900
* Beef up the interface to inline asm constraint parsing, making it more ↵Chris Lattner2006-02-011-3/+10
| | | | | | general, useful, and easier to use. llvm-svn: 25866
* Move MaskedValueIsZero from the DAGCombiner to the TargetLowering ↵Chris Lattner2006-01-301-2/+107
| | | | | | interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler. llvm-svn: 25803
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