| Commit message (Expand) | Author | Age | Files | Lines |
| * | relax assertion | Chris Lattner | 2006-04-02 | 1 | -1/+4 |
| * | Allow targets to compute masked bits for intrinsics. | Chris Lattner | 2006-04-02 | 1 | -4/+9 |
| * | Was returning the wrong type. | Chris Lattner | 2006-03-31 | 1 | -4/+5 |
| * | Modify the TargetLowering::getPackedTypeBreakdown method to also return the | Chris Lattner | 2006-03-31 | 1 | -4/+7 |
| * | Implement TargetLowering::getPackedTypeBreakdown | Chris Lattner | 2006-03-31 | 1 | -0/+41 |
| * | Typo | Evan Cheng | 2006-03-23 | 1 | -1/+1 |
| * | set TransformToType correctly for vector types. | Chris Lattner | 2006-03-16 | 1 | -0/+8 |
| * | Add LSR hooks. | Evan Cheng | 2006-03-13 | 1 | -0/+13 |
| * | I can't convince myself that this is safe, remove the recursive call. | Chris Lattner | 2006-03-13 | 1 | -18/+2 |
| * | Do not fold (add (shl x, c1), (shl c2, c1)) -> (shl (add x, c2), c1), | Chris Lattner | 2006-03-05 | 1 | -18/+0 |
| * | Number of NodeTypes now exceeds 128. | Evan Cheng | 2006-03-03 | 1 | -1/+1 |
| * | Add interfaces for targets to provide target-specific dag combiner optimizati... | Chris Lattner | 2006-03-01 | 1 | -0/+8 |
| * | Implement bit propagation through sub nodes, this (re)implements | Chris Lattner | 2006-02-27 | 1 | -3/+29 |
| * | Check RHS simplification before LHS simplification to avoid infinitely looping | Chris Lattner | 2006-02-27 | 1 | -18/+17 |
| * | Just like we use the RHS of an AND to simplify the LHS, use the LHS to | Chris Lattner | 2006-02-27 | 1 | -0/+17 |
| * | Add a bunch of missed cases. Perhaps the most significant of which is that | Chris Lattner | 2006-02-26 | 1 | -40/+206 |
| * | Recognize memory operand codes | Chris Lattner | 2006-02-24 | 1 | -1/+6 |
| * | Don't return registers from register classes that aren't legal. | Chris Lattner | 2006-02-22 | 1 | -2/+15 |
| * | split register class handling from explicit physreg handling. | Chris Lattner | 2006-02-22 | 1 | -11/+21 |
| * | Updates to match change of getRegForInlineAsmConstraint prototype | Chris Lattner | 2006-02-21 | 1 | -1/+2 |
| * | Add a fold for add that exchanges it with a constant shift if possible, so | Nate Begeman | 2006-02-18 | 1 | -6/+24 |
| * | Fix bug noticed by VC++. | Jeff Cohen | 2006-02-17 | 1 | -2/+2 |
| * | Rework the SelectionDAG-based implementations of SimplifyDemandedBits | Nate Begeman | 2006-02-16 | 1 | -122/+506 |
| * | Rename maxStoresPerMemSet to maxStoresPerMemset, etc. | Evan Cheng | 2006-02-14 | 1 | -1/+1 |
| * | implementation of some methods for inlineasm | Chris Lattner | 2006-02-04 | 1 | -1/+41 |
| * | Implement some feedback from sabre | Nate Begeman | 2006-02-03 | 1 | -5/+5 |
| * | Add a framework for eliminating instructions that produces undemanded bits. | Nate Begeman | 2006-02-03 | 1 | -1/+57 |
| * | Implement MaskedValueIsZero for ANY_EXTEND nodes | Chris Lattner | 2006-02-02 | 1 | -0/+5 |
| * | Beef up the interface to inline asm constraint parsing, making it more genera... | Chris Lattner | 2006-02-01 | 1 | -3/+10 |
| * | Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,m... | Chris Lattner | 2006-01-30 | 1 | -2/+107 |
| * | adjust prototype | Chris Lattner | 2006-01-30 | 1 | -1/+2 |
| * | clean up interface to ValueTypeActions | Chris Lattner | 2006-01-29 | 1 | -3/+3 |
| * | Implement a method for inline asm support | Chris Lattner | 2006-01-26 | 1 | -0/+17 |
| * | initialize an instance var, apparently I forgot to commit this long ago | Chris Lattner | 2006-01-25 | 1 | -0/+1 |
| * | Set SchedulingForLatency to be the default scheduling preference for all. | Evan Cheng | 2006-01-25 | 1 | -0/+1 |
| * | Lefted out TargetLowering:: | Evan Cheng | 2005-12-21 | 1 | -2/+2 |
| * | * Fix a GlobalAddress lowering bug. | Evan Cheng | 2005-12-21 | 1 | -0/+5 |
| * | Added a hook to print out names of target specific DAG nodes. | Evan Cheng | 2005-12-20 | 1 | -0/+3 |
| * | Add the majority of the vector machien value types we expect to support, | Nate Begeman | 2005-11-29 | 1 | -3/+3 |
| * | Rather than attempting to legalize 1 x float, make sure the SD ISel never | Nate Begeman | 2005-11-22 | 1 | -1/+5 |
| * | Invert the TargetLowering flag that controls divide by consant expansion. | Nate Begeman | 2005-10-21 | 1 | -0/+2 |
| * | initialize new flag | Chris Lattner | 2005-09-27 | 1 | -0/+1 |
| * | Change the names of member variables per Chris' instructions, and document | Reid Spencer | 2005-08-27 | 1 | -2/+2 |
| * | Adjust to new interface | Chris Lattner | 2005-08-24 | 1 | -4/+4 |
| * | For: memory operations -> stores | Reid Spencer | 2005-07-19 | 1 | -0/+2 |
| * | Remove trailing whitespace | Misha Brukman | 2005-04-21 | 1 | -4/+4 |
| * | Add a hook to find out how the target handles shift amounts that are out of | Chris Lattner | 2005-01-19 | 1 | -0/+1 |
| * | Shift and setcc types default to the pointer type. | Chris Lattner | 2005-01-16 | 1 | -1/+1 |
| * | Use enums, move virtual dtor out of line. | Chris Lattner | 2005-01-16 | 1 | -8/+14 |
| * | Set up identity transforms. | Chris Lattner | 2005-01-16 | 1 | -0/+7 |