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path: root/llvm/lib/Target/SystemZ/SystemZInstrFormats.td
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* [SystemZ] Add a mapping from "select register" to "load on condition" (2-addr).Jonas Paulsson2019-12-201-3/+12
* [SystemZ] Bugfix and improve the handling of CC values.Jonas Paulsson2019-12-201-3/+12
* Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"Matt Arsenault2019-09-191-83/+83
* Revert r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"Hans Wennborg2019-09-191-83/+83
* GlobalISel: Don't materialize immarg arguments to intrinsicsMatt Arsenault2019-09-191-83/+83
* [SystemZ] Add support for new cpu architecture - arch13Ulrich Weigand2019-07-121-5/+110
* [SystemZ] Support vector load/store alignment hintsUlrich Weigand2019-06-191-10/+42
* [SystemZ, RegAlloc] Favor 3-address instructions during instruction selection.Jonas Paulsson2019-06-081-67/+137
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [SystemZ] "Generic" vector assembler instructions shoud clobber CCUlrich Weigand2018-12-201-9/+14
* [SystemZ] Bugfix for MVCLoop CC clobbering.Jonas Paulsson2018-05-071-1/+1
* [SystemZ] Do not use glue to represent condition code dependenciesUlrich Weigand2018-04-301-26/+52
* [SystemZ] Refactor some VT casts in DAG match patternsUlrich Weigand2018-04-301-59/+59
* [SystemZ] Improve handling of Select pseudo-instructionsUlrich Weigand2018-04-301-2/+6
* [SystemZ] Remove scheduling info from some Pseudo instructions (NFC).Jonas Paulsson2018-04-271-1/+2
* [SystemZ] set 'guessInstructionProperties = 0' and set flags as needed.Jonas Paulsson2017-12-051-3/+11
* [SystemZ] Add support for IBM z14 processor (3/3)Ulrich Weigand2017-07-171-2/+2
* [SystemZ] Add support for IBM z14 processor (1/3)Ulrich Weigand2017-07-171-10/+316
* [SystemZ] Add all remaining instructionsUlrich Weigand2017-06-301-0/+106
* [SystemZ] Add decimal floating-point instructionsUlrich Weigand2017-05-301-0/+57
* [SystemZ] Add hexadecimal floating-point instructionsUlrich Weigand2017-05-301-9/+31
* [SystemZ] Add miscellaneous instructionsUlrich Weigand2017-05-101-0/+11
* [SystemZ] Add missing arithmetic instructionsUlrich Weigand2017-05-101-0/+71
* [SystemZ] Add decimal integer instructionsUlrich Weigand2017-05-101-2/+91
* [SystemZ] Add crypto instructionsUlrich Weigand2017-05-101-0/+26
* [SystemZ] Add translate/convert instructionsUlrich Weigand2017-05-101-0/+49
* [SystemZ] Add missing memory/string instructionsUlrich Weigand2017-05-101-10/+41
* [SystemZ] Support remaining atomic instructionsUlrich Weigand2016-12-021-0/+29
* [SystemZ] Support floating-point control register instructionsUlrich Weigand2016-12-021-5/+27
* [SystemZ] Refactor hasSideEffects settingUlrich Weigand2016-12-021-30/+9
* [SystemZ] Support execution hint instructionsUlrich Weigand2016-11-281-0/+65
* [SystemZ] Add remaining branch instructionsUlrich Weigand2016-11-281-7/+84
* [SystemZ] Improve use of conditional instructionsUlrich Weigand2016-11-281-71/+128
* [SystemZ] Support CL(G)T instructionsUlrich Weigand2016-11-111-0/+25
* [SystemZ] Add program mask and addressing mode instructionsUlrich Weigand2016-11-081-0/+7
* [SystemZ] Always use semantic instruction classesUlrich Weigand2016-11-081-2/+139
* [SystemZ] Refactor InstRR* instruction format patternsUlrich Weigand2016-11-081-65/+98
* [SystemZ] Rename some Inst* instruction format classesUlrich Weigand2016-11-081-84/+84
* [SystemZ] Refactor branch and conditional instruction patternsUlrich Weigand2016-11-081-85/+596
* [SystemZ] Fix encoding of MVCK and .insn ssUlrich Weigand2016-10-311-3/+3
* [SystemZ] Do not use LOC(G) for volatile loadsUlrich Weigand2016-10-251-1/+1
* [SystemZ] Post-RA scheduler implementationJonas Paulsson2016-10-201-2/+4
* [SystemZ] Add missing vector instructions for the assemblerUlrich Weigand2016-10-191-5/+178
* [SystemZ] Add optional argument to some vector string instructionsUlrich Weigand2016-10-191-27/+69
* [SystemZ] Add support for the .insn directiveZhan Jun Liau2016-08-081-0/+190
* [SystemZ] Add missing classes and instructionsZhan Jun Liau2016-08-051-0/+82
* [SystemZ] Recognize Load On Condition Immediate (LOCHI/LOGHI) opportunitiesZhan Jun Liau2016-07-111-0/+30
* [SystemZ] Add support for missing instructionsZhan Jun Liau2016-07-081-4/+74
* [SystemZ] Add floating-point test data class instructions.Marcin Koscielnicki2016-06-291-0/+12
* [SystemZ] Support Compare and TrapsZhan Jun Liau2016-06-101-0/+34
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