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authorUlrich Weigand <ulrich.weigand@de.ibm.com>2017-05-10 12:42:00 +0000
committerUlrich Weigand <ulrich.weigand@de.ibm.com>2017-05-10 12:42:00 +0000
commit33a441adf9b9724a831c03accb0798c4f754e5a3 (patch)
tree2b04b24a1134a94ff7c84e01d15048890c0bce4c /llvm/lib/Target/SystemZ/SystemZInstrFormats.td
parent435cd1a3e48e7472c482b660646b99ae354d82cc (diff)
downloadbcm5719-llvm-33a441adf9b9724a831c03accb0798c4f754e5a3.tar.gz
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[SystemZ] Add crypto instructions
This adds the set of message-security assist instructions for assembler / disassembler use. llvm-svn: 302645
Diffstat (limited to 'llvm/lib/Target/SystemZ/SystemZInstrFormats.td')
-rw-r--r--llvm/lib/Target/SystemZ/SystemZInstrFormats.td26
1 files changed, 26 insertions, 0 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZInstrFormats.td b/llvm/lib/Target/SystemZ/SystemZInstrFormats.td
index e60dba1db52..333425d2ad7 100644
--- a/llvm/lib/Target/SystemZ/SystemZInstrFormats.td
+++ b/llvm/lib/Target/SystemZ/SystemZInstrFormats.td
@@ -1714,6 +1714,12 @@ class SideEffectInherentS<string mnemonic, bits<16> opcode,
let BD2 = 0;
}
+class SideEffectInherentRRE<string mnemonic, bits<16> opcode>
+ : InstRRE<opcode, (outs), (ins), mnemonic, []> {
+ let R1 = 0;
+ let R2 = 0;
+}
+
// Allow an optional TLS marker symbol to generate TLS call relocations.
class CallRI<string mnemonic, bits<12> opcode>
: InstRIb<opcode, (outs), (ins GR64:$R1, brtarget16tls:$RI2),
@@ -2611,6 +2617,14 @@ class SideEffectBinaryMemMemRR<string mnemonic, bits<8> opcode,
let DisableEncoding = "$R1src, $R2src";
}
+class SideEffectBinaryMemRRE<string mnemonic, bits<16> opcode,
+ RegisterOperand cls1, RegisterOperand cls2>
+ : InstRRE<opcode, (outs cls2:$R2), (ins cls1:$R1, cls2:$R2src),
+ mnemonic#"\t$R1, $R2", []> {
+ let Constraints = "$R2 = $R2src";
+ let DisableEncoding = "$R2src";
+}
+
class SideEffectBinaryMemMemRRE<string mnemonic, bits<16> opcode,
RegisterOperand cls1, RegisterOperand cls2>
: InstRRE<opcode, (outs cls1:$R1, cls2:$R2), (ins cls1:$R1src, cls2:$R2src),
@@ -3365,6 +3379,18 @@ class TestRXE<string mnemonic, bits<16> opcode, SDPatternOperator operator,
let M3 = 0;
}
+class SideEffectTernaryMemMemMemRRFb<string mnemonic, bits<16> opcode,
+ RegisterOperand cls1,
+ RegisterOperand cls2,
+ RegisterOperand cls3>
+ : InstRRFb<opcode, (outs cls1:$R1, cls2:$R2, cls3:$R3),
+ (ins cls1:$R1src, cls2:$R2src, cls3:$R3src),
+ mnemonic#"\t$R1, $R3, $R2", []> {
+ let Constraints = "$R1 = $R1src, $R2 = $R2src, $R3 = $R3src";
+ let DisableEncoding = "$R1src, $R2src, $R3src";
+ let M4 = 0;
+}
+
class SideEffectTernaryRRFc<string mnemonic, bits<16> opcode,
RegisterOperand cls1, RegisterOperand cls2,
Immediate imm>
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