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* Fix PR18743.Rafael Espindola2014-02-182-8/+10
| | | | | | | | | | | | | | | | | | | | | | | | The IR @foo = private constant i32 42 is valid, but before this patch we would produce an invalid MachO from it. It was invalid because it would use an L label in a section where the liker needs the labels in order to atomize it. One way of fixing it would be to just reject this IR in the backend, but that would not be very front end friendly. What this patch does is use an 'l' prefix in sections that we know the linker requires symbols for atomizing them. This allows frontends to just use private and not worry about which sections they go to or how the linker handles them. One small issue with this strategy is that now a symbol name depends on the section, which is not available before codegen. This is not a problem in practice. The reason is that it only happens with private linkage, which will be ignored by the non codegen users (llvm-nm and llvm-ar). llvm-svn: 201608
* Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove ↵Daniel Sanders2014-02-131-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | hasRawTextSupport() call Summary: AsmPrinter::EmitInlineAsm() will no longer use the EmitRawText() call for targets with mature MC support. Such targets will always parse the inline assembly (even when emitting assembly). Targets without mature MC support continue to use EmitRawText() for assembly output. The hasRawTextSupport() check in AsmPrinter::EmitInlineAsm() has been replaced with MCAsmInfo::UseIntegratedAs which when true, causes the integrated assembler to parse inline assembly (even when emitting assembly output). UseIntegratedAs is set to true for targets that consider any failure to parse valid assembly to be a bug. Target specific subclasses generally enable the integrated assembler in their constructor. The default value can be overridden with -no-integrated-as. All tests that rely on inline assembly supporting invalid assembly (for example, those that use mnemonics such as 'foo' or 'hello world') have been updated to disable the integrated assembler. Changes since review (and last commit attempt): - Fixed test failures that were missed due to configuration of local build. (fixes crash.ll and a couple others). - Fixed tests that happened to pass because the local build was on X86 (should fix 2007-12-17-InvokeAsm.ll) - mature-mc-support.ll's should no longer require all targets to be compiled. (should fix ARM and PPC buildbots) - Object output (-filetype=obj and similar) now forces the integrated assembler to be enabled regardless of default setting or -no-integrated-as. (should fix SystemZ buildbots) Reviewers: rafael Reviewed By: rafael CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D2686 llvm-svn: 201333
* Revert r201237+r201238: Demote EmitRawText call in ↵Daniel Sanders2014-02-121-3/+0
| | | | | | | | AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call It introduced multiple test failures in the buildbots. llvm-svn: 201241
* Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove ↵Daniel Sanders2014-02-121-0/+3
| | | | | | | | | | | | | | | | | | | | | hasRawTextSupport() call Summary: AsmPrinter::EmitInlineAsm() will no longer use the EmitRawText() call for targets with mature MC support. Such targets will always parse the inline assembly (even when emitting assembly). Targets without mature MC support continue to use EmitRawText() for assembly output. The hasRawTextSupport() check in AsmPrinter::EmitInlineAsm() has been replaced with MCAsmInfo::UseIntegratedAs which when true, causes the integrated assembler to parse inline assembly (even when emitting assembly output). UseIntegratedAs is set to true for targets that consider any failure to parse valid assembly to be a bug. Target specific subclasses generally enable the integrated assembler in their constructor. The default value can be overridden with -no-integrated-as. All tests that rely on inline assembly supporting invalid assembly (for example, those that use mnemonics such as 'foo' or 'hello world') have been updated to disable the integrated assembler. Reviewers: rafael Reviewed By: rafael CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D2686 llvm-svn: 201237
* Use a consistent argument order in TargetLoweringObjectFile.Rafael Espindola2014-02-092-11/+9
| | | | | | | | | These methods normally call each other and it is really annoying if the arguments are in different order. The more common rule was that the arguments specific to call are first (GV, Encoding, Suffix) and the auxiliary objects (Mang, TM) come after. This patch changes the exceptions. llvm-svn: 201044
* Pass the Mangler by reference.Rafael Espindola2014-02-082-4/+4
| | | | | | | It is never null and it is not used in casts, so there is no reason to use a pointer. This matches how we pass TM. llvm-svn: 201025
* Add LLVM_OVERRIDE to a few declarations.Rafael Espindola2014-02-081-4/+5
| | | | llvm-svn: 201022
* [Sparc] Add support for parsing synthetic instruction 'mov'. Venkatraman Govindaraju2014-02-071-0/+6
| | | | llvm-svn: 200965
* [Sparc] Emit correct encoding for atomic instructions. Also, add support for ↵Venkatraman Govindaraju2014-02-074-12/+32
| | | | | | parsing CAS instructions to test the CAS encoding. llvm-svn: 200963
* [Sparc] Emit relocations for Thread Local Storage (TLS) when integrated ↵Venkatraman Govindaraju2014-02-075-4/+187
| | | | | | assembler is used. llvm-svn: 200962
* [Sparc] Emit correct relocations for PIC code when integrated assembler is used.Venkatraman Govindaraju2014-02-078-43/+139
| | | | llvm-svn: 200961
* [Sparc] Use SparcMCExpr::VariantKind itself as MachineOperand's target flags.Venkatraman Govindaraju2014-02-078-211/+92
| | | | llvm-svn: 200960
* Just returning false is the default.Rafael Espindola2014-02-061-4/+0
| | | | llvm-svn: 200890
* Remove support for not using .loc directives.Rafael Espindola2014-02-051-5/+5
| | | | | | Clang itself was not using this. The only way to access it was via llc. llvm-svn: 200862
* [Sparc] Set %o7 as the return address register instead of %i7 in ↵Venkatraman Govindaraju2014-02-012-4/+23
| | | | | | MCRegisterInfo. Also, add CFI instructions to initialize the frame correctly. llvm-svn: 200617
* [Sparc] Save and restore float registers that may be used for parameter passing.Venkatraman Govindaraju2014-01-311-2/+44
| | | | llvm-svn: 200509
* Implement SPARCv9 atomic_swap_64 with a pseudo.Jakob Stoklund Olesen2014-01-302-3/+15
| | | | | | | | The SWAP instruction only exists in a 32-bit variant, but the 64-bit atomic swap can be implemented in terms of CASX, like the other atomic rmw primitives. llvm-svn: 200453
* [Sparc] Use %r_disp32 for pc_rel entries in FDE as well.Venkatraman Govindaraju2014-01-292-0/+16
| | | | | | This makes MCAsmInfo::getExprForFDESymbol() a virtual function and overrides it in SparcMCAsmInfo. llvm-svn: 200376
* [Sparc] Use %r_disp32 for pc_rel entries in gcc_except_table and eh_frame.Venkatraman Govindaraju2014-01-298-7/+107
| | | | | | | | Otherwise, assembler (gas) fails to assemble them with error message "operation combines symbols in different segments". This is because MC computes pc_rel entries with subtract expression between labels from different sections. llvm-svn: 200373
* [SparcV9] Use correct register class (I64RegClass) to hold the address of ↵Venkatraman Govindaraju2014-01-292-3/+4
| | | | | | _GLOBAL_OFFSET_TABLE_ in sparcv9. llvm-svn: 200368
* [Sparc] Fix breakage in r200345David Woodhouse2014-01-281-9/+10
| | | | | | Oops. Don't do build tests on patches like that with --enable-targets=x86_64 llvm-svn: 200355
* Propagate MCSubtargetInfo through TableGen's getBinaryCodeForInstr()David Woodhouse2014-01-281-10/+17
| | | | llvm-svn: 200349
* Explictly pass MCSubtargetInfo to MCCodeEmitter::EncodeInstruction()David Woodhouse2014-01-281-2/+4
| | | | llvm-svn: 200348
* Change MCStreamer EmitInstruction interface to take subtarget infoDavid Woodhouse2014-01-282-23/+31
| | | | llvm-svn: 200345
* Fix the DWARF EH encodings for Sparc PIC code.Jakob Stoklund Olesen2014-01-281-0/+20
| | | | | | | Also emit the stubs that were generated for references to typeinfo symbols. llvm-svn: 200282
* Clean up the Legal/Expand logic for SPARC popc.Jakob Stoklund Olesen2014-01-262-5/+8
| | | | llvm-svn: 200141
* Pass a MCSubtargetInfo down to the TargetStreamer creation.Rafael Espindola2014-01-261-1/+2
| | | | | | | With this the target streamers will be able to know the target features that are in use. llvm-svn: 200135
* Only generate the popc instruction for SPARC CPUs that implement it.Jakob Stoklund Olesen2014-01-264-6/+13
| | | | | | | The popc instruction is defined in the SPARCv9 instruction set architecture, but it was emulated on CPUs older than Niagara 2. llvm-svn: 200131
* Fix swapped CASA operands.Jakob Stoklund Olesen2014-01-261-2/+2
| | | | | | Found by SingleSource/UnitTests/AtomicOps.c llvm-svn: 200130
* Construct the MCStreamer before constructing the MCTargetStreamer.Rafael Espindola2014-01-263-10/+21
| | | | | | | | | | This has a few advantages: * Only targets that use a MCTargetStreamer have to worry about it. * There is never a MCTargetStreamer without a MCStreamer, so we can use a reference. * A MCTargetStreamer can talk to the MCStreamer in its constructor. llvm-svn: 200129
* Fix known typosAlp Toker2014-01-241-1/+1
| | | | | | | Sweep the codebase for common typos. Includes some changes to visible function names that were misspelt. llvm-svn: 200018
* [SparcV9] Add support for JIT in Sparc64.Venkatraman Govindaraju2014-01-245-45/+189
| | | | | | With this change, all supported tests in test/ExecutionEngine pass in sparcv9. llvm-svn: 199977
* Implement atomicrmw operations in 32 and 64 bits for SPARCv9.Jakob Stoklund Olesen2014-01-243-12/+180
| | | | | | These all use the compare-and-swap CASA/CASXA instructions. llvm-svn: 199975
* [Sparc] Correct quad register list in the asm parser.Venkatraman Govindaraju2014-01-241-1/+1
| | | | | | Add test cases to check parsing of v9 double registers and their aliased quad registers. llvm-svn: 199974
* Fix out of bounds access to the double regs array. Given theEric Christopher2014-01-231-1/+1
| | | | | | | code this looks correct, but could use review. The previous was definitely not correct. llvm-svn: 199940
* [Sparc] Add support for inline assembly constraints which specify registers ↵Venkatraman Govindaraju2014-01-221-0/+20
| | | | | | by their aliases. llvm-svn: 199786
* [Sparc] Add support for inline assembly constraint 'I'. Venkatraman Govindaraju2014-01-222-0/+67
| | | | llvm-svn: 199781
* [Sparc] Do not add PC to _GLOBAL_OFFSET_TABLE_ address to access GOT in ↵Venkatraman Govindaraju2014-01-221-30/+94
| | | | | | | | absolute code. Fixes PR#18521 llvm-svn: 199775
* Add FPExt option to CCValAssign::LocInfo. When generating calling-conventionLang Hames2014-01-141-1/+3
| | | | | | | | | | promotion code, Tablegen will now select FPExt for floating point promotions (previously it had returned AExt, which is not valid for floating point types). Any out-of-tree targets that were relying on AExt being returned for FP promotions will need to update their code check for FPExt instead. llvm-svn: 199252
* Make getTargetStreamer return a possibly null pointer.Rafael Espindola2014-01-141-1/+2
| | | | | | | | | This will allow it to be called from target independent parts of the main streamer that don't know if there is a registered target streamer or not. This in turn will allow targets to perform extra actions at specified points in the interface: add extra flags for some labels, extra work during finalization, etc. llvm-svn: 199174
* Handle bundled terminators in isBlockOnlyReachableByFallthrough.Jakob Stoklund Olesen2014-01-121-35/+0
| | | | | | | | | | Targets like SPARC and MIPS have delay slots and normally bundle the delay slot instruction with the corresponding terminator. Teach isBlockOnlyReachableByFallthrough to find any MBB operands on bundled terminators so SPARC doesn't need to specialize this function. llvm-svn: 199061
* [Sparc] Add support for parsing floating point instructions.Venkatraman Govindaraju2014-01-123-164/+238
| | | | llvm-svn: 199033
* [Sparc] Replace (unsigned)-1 with ~OU as suggested by Reid Kleckner.Venkatraman Govindaraju2014-01-121-9/+9
| | | | llvm-svn: 199031
* The SPARCv9 ABI returns a float in %f0.Jakob Stoklund Olesen2014-01-122-3/+12
| | | | | | | | | | | | | | | This is different from the argument passing convention which puts the first float argument in %f1. With this patch, all returned floats are treated as if the 'inreg' flag were set. This means multiple float return values get packed in %f0, %f1, %f2, ... Note that when returning a struct in registers, clang will set the 'inreg' flag on the return value, so that behavior is unchanged. This also happens when returning a float _Complex. llvm-svn: 199028
* [Sparc] Add missing processor types: v7 and niagaraVenkatraman Govindaraju2014-01-112-8/+7
| | | | llvm-svn: 199024
* [Sparc] Bundle instruction with delay slow and its filler. Now, we can use ↵Venkatraman Govindaraju2014-01-112-22/+21
| | | | | | -verify-machineinstrs with SPARC backend. llvm-svn: 199014
* [Sparc] Emit retl/ret instead of jmp instruction. It improves the ↵Venkatraman Govindaraju2014-01-101-0/+6
| | | | | | readability of the assembly generated. llvm-svn: 198910
* [Sparc] Add support for parsing jmpl instruction and make indirect call and ↵Venkatraman Govindaraju2014-01-106-22/+70
| | | | | | jmp instructions as aliases to jmpl. llvm-svn: 198909
* [Sparc] Multiclass for loads/stores. No functionality change intended.Venkatraman Govindaraju2014-01-092-140/+46
| | | | llvm-svn: 198893
* [SparcV9] Rename operands in some sparc64 instructions so that TableGen can ↵Venkatraman Govindaraju2014-01-082-15/+15
| | | | | | encode them correctly. llvm-svn: 198740
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