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authorVenkatraman Govindaraju <venkatra@cs.wisc.edu>2014-02-07 09:06:52 +0000
committerVenkatraman Govindaraju <venkatra@cs.wisc.edu>2014-02-07 09:06:52 +0000
commitde98fae368ba3154dd80205230efe7a9980b6342 (patch)
tree1031cd1b10cfd4ccadea3842796c7491910ca850 /llvm/lib/Target/Sparc
parent25f2afdee0131dfe025f1987f3f6a5c52a883c06 (diff)
downloadbcm5719-llvm-de98fae368ba3154dd80205230efe7a9980b6342.tar.gz
bcm5719-llvm-de98fae368ba3154dd80205230efe7a9980b6342.zip
[Sparc] Add support for parsing synthetic instruction 'mov'.
llvm-svn: 200965
Diffstat (limited to 'llvm/lib/Target/Sparc')
-rw-r--r--llvm/lib/Target/Sparc/SparcInstrAliases.td6
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/Sparc/SparcInstrAliases.td b/llvm/lib/Target/Sparc/SparcInstrAliases.td
index 2c7aba27e35..7242c59059a 100644
--- a/llvm/lib/Target/Sparc/SparcInstrAliases.td
+++ b/llvm/lib/Target/Sparc/SparcInstrAliases.td
@@ -134,3 +134,9 @@ def : InstAlias<"retl", (RETL 8)>;
// ret -> RET 8
def : InstAlias<"ret", (RET 8)>;
+
+// mov reg, rd -> or %g0, reg, rd
+def : InstAlias<"mov $rs2, $rd", (ORrr IntRegs:$rd, G0, IntRegs:$rs2)>;
+
+// mov simm13, rd -> or %g0, simm13, rd
+def : InstAlias<"mov $simm13, $rd", (ORri IntRegs:$rd, G0, i32imm:$simm13)>;
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