Only generate the popc instruction for SPARC CPUs that implement it.

The popc instruction is defined in the SPARCv9 instruction set
architecture, but it was emulated on CPUs older than Niagara 2.

llvm-svn: 200131

4 files changed, 13 insertions, 6 deletions

diff --git a/llvm/lib/Target/Sparc/Sparc.td b/llvm/lib/Target/Sparc/Sparc.td
index 9f6992de2f1..ab86dc9c311 100644
--- a/llvm/lib/Target/Sparc/Sparc.td
+++ b/llvm/lib/Target/Sparc/Sparc.td
@@ -34,6 +34,9 @@ def FeatureHardQuad
   : SubtargetFeature<"hard-quad-float", "HasHardQuad", "true",
                      "Enable quad-word floating point instructions">;
 
+def UsePopc : SubtargetFeature<"popc", "UsePopc", "true",
+                               "Use the popc (population count) instruction">;
+
 //===----------------------------------------------------------------------===//
 // Register File, Calling Conv, Instruction Descriptions
 //===----------------------------------------------------------------------===//
@@ -69,9 +72,9 @@ def : Proc<"v9",              [FeatureV9]>;
 def : Proc<"ultrasparc",      [FeatureV9, FeatureV8Deprecated]>;
 def : Proc<"ultrasparc3",     [FeatureV9, FeatureV8Deprecated]>;
 def : Proc<"niagara",         [FeatureV9, FeatureV8Deprecated]>;
-def : Proc<"niagara2",        [FeatureV9, FeatureV8Deprecated]>;
-def : Proc<"niagara3",        [FeatureV9, FeatureV8Deprecated]>;
-def : Proc<"niagara4",        [FeatureV9, FeatureV8Deprecated]>;
+def : Proc<"niagara2",        [FeatureV9, FeatureV8Deprecated, UsePopc]>;
+def : Proc<"niagara3",        [FeatureV9, FeatureV8Deprecated, UsePopc]>;
+def : Proc<"niagara4",        [FeatureV9, FeatureV8Deprecated, UsePopc]>;
 
 
 //===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/Sparc/SparcISelLowering.cpp b/llvm/lib/Target/Sparc/SparcISelLowering.cpp
index b5550496662..9bec9113b56 100644
--- a/llvm/lib/Target/Sparc/SparcISelLowering.cpp
+++ b/llvm/lib/Target/Sparc/SparcISelLowering.cpp
@@ -1463,7 +1463,8 @@ SparcTargetLowering::SparcTargetLowering(TargetMachine &TM)
     setOperationAction(ISD::BR_CC, MVT::i64, Custom);
     setOperationAction(ISD::SELECT_CC, MVT::i64, Custom);
 
-    setOperationAction(ISD::CTPOP, MVT::i64, Legal);
+    if (Subtarget->usePopc())
+      setOperationAction(ISD::CTPOP, MVT::i64, Legal);
     setOperationAction(ISD::CTTZ , MVT::i64, Expand);
     setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand);
     setOperationAction(ISD::CTLZ , MVT::i64, Expand);
@@ -1569,7 +1570,7 @@ SparcTargetLowering::SparcTargetLowering(TargetMachine &TM)
 
   setStackPointerRegisterToSaveRestore(SP::O6);
 
-  if (Subtarget->isV9())
+  if (Subtarget->isV9() && Subtarget->usePopc())
     setOperationAction(ISD::CTPOP, MVT::i32, Legal);
 
   if (Subtarget->isV9() && Subtarget->hasHardQuad()) {
diff --git a/llvm/lib/Target/Sparc/SparcSubtarget.cpp b/llvm/lib/Target/Sparc/SparcSubtarget.cpp
index 7032d7f3fb0..7373613eb26 100644
--- a/llvm/lib/Target/Sparc/SparcSubtarget.cpp
+++ b/llvm/lib/Target/Sparc/SparcSubtarget.cpp
@@ -31,7 +31,8 @@ SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &CPU,
   V8DeprecatedInsts(false),
   IsVIS(false),
   Is64Bit(is64Bit),
-  HasHardQuad(false) {
+  HasHardQuad(false),
+  UsePopc(false) {
 
   // Determine default and user specified characteristics
   std::string CPUName = CPU;
diff --git a/llvm/lib/Target/Sparc/SparcSubtarget.h b/llvm/lib/Target/Sparc/SparcSubtarget.h
index 012aca7d923..154afb55f80 100644
--- a/llvm/lib/Target/Sparc/SparcSubtarget.h
+++ b/llvm/lib/Target/Sparc/SparcSubtarget.h
@@ -30,6 +30,7 @@ class SparcSubtarget : public SparcGenSubtargetInfo {
   bool IsVIS;
   bool Is64Bit;
   bool HasHardQuad;
+  bool UsePopc;
 
 public:
   SparcSubtarget(const std::string &TT, const std::string &CPU,
@@ -39,6 +40,7 @@ public:
   bool isVIS() const { return IsVIS; }
   bool useDeprecatedV8Instructions() const { return V8DeprecatedInsts; }
   bool hasHardQuad() const { return HasHardQuad; }
+  bool usePopc() const { return UsePopc; }
 
   /// ParseSubtargetFeatures - Parses features string setting specified
   /// subtarget options.  Definition of function is auto generated by tblgen.