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| author | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2014-01-29 03:35:08 +0000 |
|---|---|---|
| committer | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2014-01-29 03:35:08 +0000 |
| commit | 50f32d949b226d24b471904ebeb914e40d008470 (patch) | |
| tree | b9e3cefc9855228b5c7455da5b017a16293f8f88 /llvm/lib/Target/Sparc | |
| parent | 310f501ef07dd2ba454fb99471703c930195e9e3 (diff) | |
| download | bcm5719-llvm-50f32d949b226d24b471904ebeb914e40d008470.tar.gz bcm5719-llvm-50f32d949b226d24b471904ebeb914e40d008470.zip | |
[SparcV9] Use correct register class (I64RegClass) to hold the address of _GLOBAL_OFFSET_TABLE_ in sparcv9.
llvm-svn: 200368
Diffstat (limited to 'llvm/lib/Target/Sparc')
| -rw-r--r-- | llvm/lib/Target/Sparc/SparcInstrInfo.cpp | 5 | ||||
| -rw-r--r-- | llvm/lib/Target/Sparc/SparcInstrInfo.td | 2 |
2 files changed, 4 insertions, 3 deletions
diff --git a/llvm/lib/Target/Sparc/SparcInstrInfo.cpp b/llvm/lib/Target/Sparc/SparcInstrInfo.cpp index c10b5b30051..6ecf81de836 100644 --- a/llvm/lib/Target/Sparc/SparcInstrInfo.cpp +++ b/llvm/lib/Target/Sparc/SparcInstrInfo.cpp @@ -431,8 +431,9 @@ unsigned SparcInstrInfo::getGlobalBaseReg(MachineFunction *MF) const MachineBasicBlock::iterator MBBI = FirstMBB.begin(); MachineRegisterInfo &RegInfo = MF->getRegInfo(); - GlobalBaseReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass); - + const TargetRegisterClass *PtrRC = + Subtarget.is64Bit() ? &SP::I64RegsRegClass : &SP::IntRegsRegClass; + GlobalBaseReg = RegInfo.createVirtualRegister(PtrRC); DebugLoc dl; diff --git a/llvm/lib/Target/Sparc/SparcInstrInfo.td b/llvm/lib/Target/Sparc/SparcInstrInfo.td index f6a5f722b09..4aebdae6a7a 100644 --- a/llvm/lib/Target/Sparc/SparcInstrInfo.td +++ b/llvm/lib/Target/Sparc/SparcInstrInfo.td @@ -180,7 +180,7 @@ def tlscall : SDNode<"SPISD::TLS_CALL", SDT_SPCall, [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue, SDNPVariadic]>; -def getPCX : Operand<i32> { +def getPCX : Operand<iPTR> { let PrintMethod = "printGetPCX"; } |
