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* Change TargetInstrInfo::isMoveInstr to return source and destination ↵Evan Cheng2009-01-201-1/+4
| | | | | | sub-register indices as well. llvm-svn: 62600
* Tidy up #includes, deleting a bunch of unnecessary #includes.Dan Gohman2009-01-051-0/+1
| | | | llvm-svn: 61715
* Split foldMemoryOperand into public non-virtual and protected virtualDan Gohman2008-12-031-3/+3
| | | | | | | parts, and add target-independent code to add/preserve MachineMemOperands. llvm-svn: 60488
* Add more const qualifiers. This fixes build breakage from r59540.Dan Gohman2008-11-181-2/+2
| | | | llvm-svn: 59542
* Const-ify several TargetInstrInfo methods.Dan Gohman2008-10-161-1/+1
| | | | llvm-svn: 57622
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-031-12/+12
| | | | | | isReg, etc., from isRegister, etc. llvm-svn: 57006
* Remove isImm(), isReg(), and friends, in favor of Dan Gohman2008-09-131-4/+4
| | | | | | | | | isImmediate(), isRegister(), and friends, to avoid confusion about having two different names with the same meaning. I'm not attached to the longer names, and would be ok with changing to the shorter names if others prefer it. llvm-svn: 56189
* Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy ↵Owen Anderson2008-08-261-4/+7
| | | | | | | | | requested was inserted or not. This allows bitcast in fast isel to properly handle the case where an appropriate reg-to-reg copy is not available. llvm-svn: 55375
* Convert uses of std::vector in TargetInstrInfo to SmallVector. This change ↵Owen Anderson2008-08-141-1/+1
| | | | | | had to be propoagated down into all the targets and up into all clients of this API. llvm-svn: 54802
* Pool-allocation for MachineInstrs, MachineBasicBlocks, andDan Gohman2008-07-071-6/+6
| | | | | | | | | | | MachineMemOperands. The pools are owned by MachineFunctions. This drastically reduces the number of calls to malloc/free made during the "Emit" phase of scheduling, as well as later phases in CodeGen. Combined with other changes, this speeds up the "instruction selection" phase of CodeGen by 10% in some cases. llvm-svn: 53212
* - Remove calls to copyKillDeadInfo which is an N^2 function. Instead, ↵Evan Cheng2008-07-031-7/+10
| | | | | | | | propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc. - Also remove LiveVariables::instructionChanged, etc. Replace all calls with cheaper calls which update VarInfo kill list. llvm-svn: 53097
* It's not always safe to fold movsd into xorpd, etc. Check the alignment of ↵Evan Cheng2008-02-081-3/+4
| | | | | | the load address first to make sure it's 16 byte aligned. llvm-svn: 46893
* Add missing newline at EOF.Duncan Sands2008-01-071-1/+1
| | | | llvm-svn: 45712
* Move even more functionality from MRegisterInfo into TargetInstrInfo.Owen Anderson2008-01-071-0/+38
| | | | | | Some day I'll get it all moved over... llvm-svn: 45672
* Move some more instruction creation methods from RegisterInfo into InstrInfo.Owen Anderson2008-01-011-0/+92
| | | | llvm-svn: 45484
* Fix a problem where lib/Target/TargetInstrInfo.h would include and useChris Lattner2008-01-011-1/+1
| | | | | | | | | | a header file from libcodegen. This violates a layering order: codegen depends on target, not the other way around. The fix to this is to split TII into two classes, TII and TargetInstrInfoImpl, which defines stuff that depends on libcodegen. It is defined in libcodegen, where the base is not. llvm-svn: 45475
* Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of theOwen Anderson2007-12-311-1/+23
| | | | | | Machine-level API cleanup instigated by Chris. llvm-svn: 45470
* Add new shorter predicates for testing machine operands for various types: Chris Lattner2007-12-301-2/+2
| | | | | | | | | | | | e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on switching everything over, so new clients should just start using the shorter names. Remove old long accessors, switching everything over to use the short accessor: getMachineBasicBlock() -> getMBB(), getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc. llvm-svn: 45464
* Use MachineOperand::getImm instead of MachineOperand::getImmedValue. ↵Chris Lattner2007-12-301-3/+3
| | | | | | Likewise setImmedValue -> setImm llvm-svn: 45453
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Add lengthof and endof templates that hide a lot of sizeof computations.Owen Anderson2007-09-071-1/+2
| | | | | | Patch by Sterling Stein! llvm-svn: 41758
* RemoveBranch() and InsertBranch() now returns number of instructions deleted ↵Evan Cheng2007-05-181-3/+5
| | | | | | / inserted. llvm-svn: 37193
* Change MachineInstr ctor's to take a TargetInstrDescriptor reference insteadEvan Cheng2006-11-271-1/+1
| | | | | | of opcode and number of operands. llvm-svn: 31947
* Matches MachineInstr changes.Evan Cheng2006-11-131-1/+1
| | | | llvm-svn: 31712
* fix warning about missing newline at end of fileRafael Espindola2006-10-241-1/+1
| | | | llvm-svn: 31162
* implement uncond branch insertion for sparc to fix regressions from last nightChris Lattner2006-10-241-0/+8
| | | | | | due to branchfolding llvm-svn: 31157
* Rename SPARC V8 target to be the LLVM SPARC target.Chris Lattner2006-02-051-0/+98
| | | | llvm-svn: 25985
* Great renaming: Sparc --> SparcV9Brian Gaeke2004-02-251-799/+0
| | | | llvm-svn: 11826
* Reorganized the Sparc backend to be more modular -- each differentMisha Brukman2003-12-171-21/+22
| | | | | | | | | | | | | implementation of a Target{RegInfo, InstrInfo, Machine, etc} now has a separate header and a separate implementation file. This means that instead of a massive SparcInternals.h that forces a recompilation of the whole target whenever a minor detail is changed, you should only recompile a few files. Note that SparcInternals.h is still around; its contents should be minimized. llvm-svn: 10500
* Put all LLVM code into the llvm namespace, as per bug 109.Brian Gaeke2003-11-111-0/+4
| | | | llvm-svn: 9903
* * Use the MachineConstantPool for storing constants instead of a hash_set;Misha Brukman2003-11-071-17/+41
| | | | | | | | * Do not create new globals for constants! Also, order #includes as per coding style guide llvm-svn: 9772
* Hrm, unbreak stuph :(Chris Lattner2003-10-211-0/+1
| | | | llvm-svn: 9334
* Fix preselection/lowerswitches bugChris Lattner2003-10-211-0/+3
| | | | llvm-svn: 9333
* Added LLVM project notice to the top of every C++ source file.John Criswell2003-10-201-0/+7
| | | | | | Header files will be on the way. llvm-svn: 9298
* Change the Opcode enum for PHI nodes from "Instruction::PHINode" to ↵Chris Lattner2003-10-191-1/+1
| | | | | | "Instruction::PHI" to be more consistent with the other instructions. llvm-svn: 9269
* Don't include "Config/stdlib.h".Brian Gaeke2003-10-101-1/+0
| | | | llvm-svn: 9037
* Unify all constant evaluations that depend on register sizeVikram S. Adve2003-07-291-66/+92
| | | | | | in ConvertConstantToIntType. llvm-svn: 7395
* Simplify code by using ConstantInt::getRawValue instead of checking to seeChris Lattner2003-07-231-11/+5
| | | | | | whether the constant is signed or unsigned, then casting llvm-svn: 7252
* Bug fix in creating constants: need 1U << 31, not 1 << 31.Vikram S. Adve2003-07-101-1/+1
| | | | llvm-svn: 7158
* Merged in autoconf branch. This provides configuration via the autoconfJohn Criswell2003-06-301-1/+1
| | | | | | system. llvm-svn: 7014
* * Changed Bcc instructions to behave like BPcc instructionsMisha Brukman2003-06-061-2/+2
| | | | | | | | | * BPA and BPN do not take a %cc register as a parameter * SLL/SRL/SRA{r,i}5 are there for a reason - they are ONLY 32-bit instructions * Likewise, SLL/SRL/SRAX{r,i}6 are only 64-bit * Added WRCCR{r,i} opcodes llvm-svn: 6655
* Convert load/store opcodes from register to immediate forms, if necessary.Misha Brukman2003-06-031-4/+13
| | | | llvm-svn: 6565
* Extensive changes to the way code generation occurs for functionVikram S. Adve2003-05-311-20/+25
| | | | | | | | | | | | | | call arguments and return values: Now all copy operations before and after a call are generated during selection instead of during register allocation. The values are copied to virtual registers (or to the stack), but in the former case these operands are marked with the correct physical registers according to the calling convention. Although this complicates scheduling and does not work well with live range analysis, it simplifies the machine-dependent part of register allocation. llvm-svn: 6465
* Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.Misha Brukman2003-05-271-16/+16
| | | | llvm-svn: 6373
* Bug fix: sign-extension was not happening for C = -MININT since C == -C!Vikram S. Adve2003-05-251-2/+3
| | | | llvm-svn: 6332
* Cleaned up code layout, spacing, etc. for readability purposes and to be moreMisha Brukman2003-05-211-115/+100
| | | | | | | | | consistent with the style of LLVM's code base (and itself! it's inconsistent in some places.) No functional changes were made. llvm-svn: 6265
* Sparc instruction opcodes now all live under the `V9' namespace.Misha Brukman2003-05-201-74/+76
| | | | llvm-svn: 6249
* IntegerRegSize is always 8 for sparcChris Lattner2003-04-261-3/+1
| | | | llvm-svn: 5961
* Fix obvious type-oChris Lattner2003-04-251-1/+1
| | | | llvm-svn: 5932
* Move sparc specific code into the Sparc backendChris Lattner2003-01-151-0/+47
| | | | llvm-svn: 5317
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