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path: root/llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h
Commit message (Expand)AuthorAgeFilesLines
* [RISCV] Check the target-abi module flag matches the optionZakk Chen2020-01-271-0/+2
* [RISCV] Machine Operand Flag SerializationSam Elliott2019-12-091-13/+19
* [RISCV] Handle variable sized objects with the stack need to be realignedShiva Chen2019-11-161-0/+4
* [RISCV] Add MachineInstr immediate verificationLuis Marques2019-10-161-0/+16
* [RISCV] Add lowering of global TLS addressesLewis Revill2019-06-191-0/+5
* [RISCV] Lower calls through PLTLewis Revill2019-06-181-0/+1
* [RISCV] Add lowering of addressing sequences for PICLewis Revill2019-06-111-0/+1
* [RISCV] Attach VK_RISCV_CALL to symbols upon creationAlex Bradbury2019-04-011-0/+1
* [RISCV] Generate address sequences suitable for mcmodel=mediumAlex Bradbury2019-04-011-0/+1
* [RISCV] Add basic RV32E definitions and MC layer supportAlex Bradbury2019-03-221-0/+8
* [RISCV] Support -target-abi at the MC layer and for codegenAlex Bradbury2019-03-091-0/+20
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [RISCV][NFC] Define and use the new CA instruction formatAlex Bradbury2018-11-161-3/+4
* [RISCV] Support named operands for CSR instructions.Ana Pazos2018-10-041-0/+157
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