summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/RISCV/Utils
Commit message (Expand)AuthorAgeFilesLines
* [RISCV] Support ABI checking with per function target-featuresZakk Chen2020-01-271-10/+1
* Revert "[RISCV] Support ABI checking with per function target-features"Zakk Chen2020-01-271-1/+10
* [RISCV] Check the target-abi module flag matches the optionZakk Chen2020-01-272-10/+16
* [RISCV] Support ABI checking with per function target-featuresZakk Chen2020-01-151-10/+1
* Revert "[RISCV] Support ABI checking with per function target-features"Zakk Chen2020-01-151-1/+10
* [RISCV] Support ABI checking with per function target-featuresZakk Chen2020-01-151-10/+1
* [RISCV] Machine Operand Flag SerializationSam Elliott2019-12-091-13/+19
* [cmake] Explicitly mark libraries defined in lib/ as "Component Libraries"Tom Stellard2019-11-211-1/+1
* [RISCV] Handle variable sized objects with the stack need to be realignedShiva Chen2019-11-162-0/+10
* [RISCV] Add MachineInstr immediate verificationLuis Marques2019-10-161-0/+16
* [RISCV] Avoid signed integer overflow UB in RISCVMatInt::generateInstSeqAlex Bradbury2019-07-181-1/+1
* [RISCV] Add lowering of global TLS addressesLewis Revill2019-06-191-0/+5
* [RISCV] Prevent re-ordering some adds after shiftsSam Elliott2019-06-182-4/+28
* [RISCV] Lower calls through PLTLewis Revill2019-06-181-0/+1
* [RISCV] Add lowering of addressing sequences for PICLewis Revill2019-06-111-0/+1
* [RISCV] Attach VK_RISCV_CALL to symbols upon creationAlex Bradbury2019-04-011-0/+1
* [RISCV] Generate address sequences suitable for mcmodel=mediumAlex Bradbury2019-04-011-0/+1
* [RISCV] Add basic RV32E definitions and MC layer supportAlex Bradbury2019-03-222-10/+38
* [RISCV] Support -target-abi at the MC layer and for codegenAlex Bradbury2019-03-092-0/+71
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-194-16/+12
* [RISCV][NFC] Define and use the new CA instruction formatAlex Bradbury2018-11-161-3/+4
* [RISCV] Introduce the RISCVMatInt::generateInstSeq helperAlex Bradbury2018-11-153-0/+116
* [RISCV] Support named operands for CSR instructions.Ana Pazos2018-10-044-0/+193
OpenPOWER on IntegriCloud