summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
Commit message (Expand)AuthorAgeFilesLines
* [RISCV] Fix evaluating %pcrel_lo against global and weak symbolsJames Clarke2020-01-231-34/+63
* [RISCV] Fix evaluation of %pcrel_loRoger Ferrer Ibanez2019-11-081-3/+7
* [MC] Minor cleanup to MCFixup::Kind handling. NFC.Sam Clegg2019-08-231-5/+4
* [RISCV] Don't force absolute FK_Data_X fixups to relocsAlex Bradbury2019-08-191-0/+7
* [DebugInfo] Generate fixups as emitting DWARF .debug_frame/.eh_frame.Hsiangkai Wang2019-07-191-0/+1
* Revert "[DebugInfo] Generate fixups as emitting DWARF .debug_frame/.eh_frame."Hsiangkai Wang2019-07-181-1/+0
* [DebugInfo] Generate fixups as emitting DWARF .debug_frame/.eh_frame.Hsiangkai Wang2019-07-181-0/+1
* [RISCV] Avoid overflow when determining number of nops for code alignAlex Bradbury2019-07-161-2/+6
* [RISCV] Fix a potential issue in shouldInsertFixupForCodeAlign()Alex Bradbury2019-07-161-4/+3
* [RISCV] Simplify RISCVAsmBackend::writeNopData(). NFCFangrui Song2019-06-151-7/+3
* [RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiersLewis Revill2019-04-231-0/+6
* [RISCV] Support assembling TLS add and associated modifiersLewis Revill2019-04-041-0/+3
* [RISCV] Support assembling @plt symbol operandsAlex Bradbury2019-04-021-1/+2
* [RISCV] Support -target-abi at the MC layer and for codegenAlex Bradbury2019-03-091-1/+1
* [RISCV] Support assembling %got_pcrel_hi operatorAlex Bradbury2019-02-151-0/+7
* [RISCV] Insert R_RISCV_ALIGN relocation type and Nops for code alignment when...Shiva Chen2019-01-301-0/+52
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [RISCV] Properly evaluate fixup_riscv_pcrel_lo12Alex Bradbury2018-12-201-0/+39
* [RISCV] Support .option relax and .option norelaxAlex Bradbury2018-11-121-98/+1
* Fix compilation of WebAssembly and RISCV after r334078Ilya Biryukov2018-06-061-4/+8
* [RISCV] Support resolving fixup_riscv_call and add to MCFixupKindInfo tableShiva Chen2018-05-301-1/+12
* [RISCV] Support linker relax function call from auipc and jalr to jalShiva Chen2018-05-241-1/+2
* [RISCV] Add symbol diff relocation support for RISC-VAlex Bradbury2018-05-231-0/+5
* [RISCV] Correctly report sizes for builtin fixupsAlex Bradbury2018-05-231-15/+2
* MC: Separate creating a generic object writer from creating a target object w...Peter Collingbourne2018-05-211-5/+5
* MC: Change MCAsmBackend::writeNopData() to take a raw_ostream instead of an M...Peter Collingbourne2018-05-211-5/+6
* [RISCV] Add WasForced parameter to MCAsmBackend::fixupNeedsRelaxationAdvancedShiva Chen2018-05-181-5/+22
* [RISCV] Define FeatureRelax and shouldForceRelocation for RISCV linker relaxa...Shiva Chen2018-05-151-0/+8
* [RISCV] Implement MC relaxations for compressed instructions.Sameer AbuAsal2018-03-021-7/+80
* [RISCV] Add support for %pcrel_lo.Ahmed Charles2018-02-061-9/+13
* [RISCV] Allow RISCVAsmBackend::writeNopData to generate c.nop when supportedAlex Bradbury2018-01-171-8/+18
* Thread MCSubtargetInfo through Target::createMCAsmBackendAlex Bradbury2018-01-031-1/+2
* [RISCV] MC layer support for the jump/branch instructions of the RVC extensionAlex Bradbury2017-12-071-2/+40
* [RISCV] Silence an unused variable warning in release builds [NFC]Mandeep Singh Grang2017-11-101-4/+5
* [RISCV] Fix build after r315327Alex Bradbury2017-10-111-2/+3
* [RISCV] Add common fixups and relocationsAlex Bradbury2017-09-281-1/+106
* [RISCV] Fix two abuses of llvm_unreachableAlex Bradbury2017-08-201-1/+1
* Fully fix the movw/movt addend.Rafael Espindola2017-07-111-2/+2
* Remove redundant argument.Rafael Espindola2017-06-241-2/+2
* ARM: move some logic from processFixupValue to applyFixup.Rafael Espindola2017-06-231-2/+4
* Use a MutableArrayRef. NFC.Rafael Espindola2017-06-211-3/+3
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-1/+1
* Add MCContext argument to MCAsmBackend::applyFixup for error reportingAlex Bradbury2017-04-051-2/+2
* [RISCV] Add bare-bones RISC-V MCTargetDescAlex Bradbury2016-11-011-0/+91
OpenPOWER on IntegriCloud