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path: root/llvm/lib/Target/RISCV/MCTargetDesc
Commit message (Expand)AuthorAgeFilesLines
* [RISCV] Fix evaluating %pcrel_lo against global and weak symbolsJames Clarke2020-01-234-108/+79
* CMake: Make most target symbols hidden by defaultTom Stellard2020-01-141-1/+1
* [RISCV] Fix evalutePCRelLo for symbols at the end of a fragmentJames Clarke2020-01-081-1/+5
* [MC] Add parameter `Address` to MCInstrPrinter::printInstructionFangrui Song2020-01-062-3/+3
* [MC] Add parameter `Address` to MCInstPrinter::printInstFangrui Song2020-01-062-4/+5
* [RISCV] Don't crash on unsupported relocationsLuís Marques2019-12-191-2/+11
* [cmake] Explicitly mark libraries defined in lib/ as "Component Libraries"Tom Stellard2019-11-211-1/+1
* [RISCV] Fix evaluation of %pcrel_loRoger Ferrer Ibanez2019-11-081-3/+7
* [Mips] Use appropriate private label prefix based on Mips ABIMirko Brkusanin2019-10-231-1/+2
* [RISCV] Add MachineInstr immediate verificationLuis Marques2019-10-161-0/+1
* [RISCV] Support llvm-objdump -M no-aliases and -M numericSam Elliott2019-09-102-0/+20
* [RISCV] Add Option for Printing Architectural Register NamesSam Elliott2019-09-102-2/+13
* [MC] Minor cleanup to MCFixup::Kind handling. NFC.Sam Clegg2019-08-232-6/+5
* [RISCV] Implement getExprForFDESymbol to ensure RISCV_32_PCREL is used for th...Alex Bradbury2019-08-205-0/+30
* [RISCV] Don't force absolute FK_Data_X fixups to relocsAlex Bradbury2019-08-191-0/+7
* [RISCV] Convert registers from unsigned to RegisterLuis Marques2019-08-162-2/+4
* [llvm] Migrate llvm::make_unique to std::make_uniqueJonas Devlieghere2019-08-151-1/+1
* [RISCV] Add Custom Parser for Atomic Memory OperandsSam Elliott2019-08-012-0/+14
* [DebugInfo] Generate fixups as emitting DWARF .debug_frame/.eh_frame.Hsiangkai Wang2019-07-192-0/+5
* Revert "[DebugInfo] Generate fixups as emitting DWARF .debug_frame/.eh_frame."Hsiangkai Wang2019-07-182-5/+0
* [DebugInfo] Generate fixups as emitting DWARF .debug_frame/.eh_frame.Hsiangkai Wang2019-07-182-0/+5
* [RISCV] Avoid overflow when determining number of nops for code alignAlex Bradbury2019-07-161-2/+6
* [RISCV] Fix a potential issue in shouldInsertFixupForCodeAlign()Alex Bradbury2019-07-161-4/+3
* [RISCV] Make RISCVELFObjectWriter::getRelocType check IsPCRelAlex Bradbury2019-07-161-25/+36
* [RISCV] Add pseudo instruction for calls with explicit registerLewis Revill2019-06-261-11/+22
* [RISCV] Simplify RISCVAsmBackend::writeNopData(). NFCFangrui Song2019-06-151-7/+3
* [RISCV] Add CFI directives for RISCV prologue/epilog.Hsiangkai Wang2019-06-122-1/+8
* Revert CMake: Make most target symbols hidden by defaultTom Stellard2019-06-111-1/+1
* CMake: Make most target symbols hidden by defaultTom Stellard2019-06-101-1/+1
* [RISCV] Create a TargetInfo header. NFCRichard Trieu2019-05-152-3/+1
* [RISCV] Move InstPrinter files to MCTargetDesc. NFCRichard Trieu2019-05-115-2/+171
* [RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiersLewis Revill2019-04-237-0/+39
* [RISCV] Support assembling TLS add and associated modifiersLewis Revill2019-04-047-4/+156
* [RISCV] Support assembling @plt symbol operandsAlex Bradbury2019-04-027-4/+22
* [RISCV] Attach VK_RISCV_CALL to symbols upon creationAlex Bradbury2019-04-011-5/+1
* [RISCV] Don't evaluatePCRelLo if a relocation will be forced (e.g. due to lin...Alex Bradbury2019-04-012-2/+21
* [RISCV] Add basic RV32E definitions and MC layer supportAlex Bradbury2019-03-221-0/+1
* [RISCV][MC] Find matching pcrel_hi fixup in more cases.Eli Friedman2019-03-121-4/+12
* [RISCV] Support -target-abi at the MC layer and for codegenAlex Bradbury2019-03-094-6/+39
* [RISCV] Support assembling %got_pcrel_hi operatorAlex Bradbury2019-02-157-4/+26
* [RISCV] Insert R_RISCV_ALIGN relocation type and Nops for code alignment when...Shiva Chen2019-01-304-1/+70
* [RISCV] Add R_RISCV_RELAX relocation to all possible relax candidates.Kito Cheng2019-01-211-7/+15
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-1916-64/+48
* [RISCV] Properly evaluate fixup_riscv_pcrel_lo12Alex Bradbury2018-12-204-6/+132
* [RISCV] Support .option push and .option popAlex Bradbury2018-11-284-0/+16
* [RISCV] Support .option relax and .option norelaxAlex Bradbury2018-11-126-98/+135
* [RISCV] Support named operands for CSR instructions.Ana Pazos2018-10-042-126/+1
* [Target] Untangle disassemblersBenjamin Kramer2018-09-101-1/+0
* [RISCV] Fix crash in decoding instruction with unknown floating point roundin...Ana Pazos2018-09-071-0/+15
* Test commit: fix punctuationChih-Mao Chen2018-08-141-1/+1
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