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path: root/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
Commit message (Expand)AuthorAgeFilesLines
* [RISCV] Support named operands for CSR instructions.Ana Pazos2018-10-041-1/+1
* [RISCV] Fix decoding of invalid instruction with C extension enabled.Ana Pazos2018-09-131-0/+18
* [RISCV] Fix crash in decoding instruction with unknown floating point roundin...Ana Pazos2018-09-071-0/+12
* [RISCV] Fix AddressSanitizer heap-buffer-overflow in disassemblingAna Pazos2018-09-071-0/+8
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-141-3/+4
* [RISCV] Implement c.lui immediate operand constraintShiva Chen2018-02-221-0/+11
* [RISCV][NFC] Update RISCVInstrInfoC.td to match usual instruction naming conv...Alex Bradbury2017-12-131-6/+8
* [RISCV] MC layer support for the remaining RVC instructionsAlex Bradbury2017-12-131-14/+66
* [RISCV] MC layer support for load/store instructions of the C (compressed) ex...Alex Bradbury2017-12-071-13/+49
* [RISCV] MC layer support for the standard RV32D instruction set extensionAlex Bradbury2017-12-071-0/+25
* [RISCV] MC layer support for the standard RV32F instruction set extensionAlex Bradbury2017-12-071-0/+25
* [RISCV][NFC] Remove unnecessary {} around single statement if blockAlex Bradbury2017-11-211-2/+1
* [RISCV] Prepare for the use of variable-sized register classesAlex Bradbury2017-10-191-8/+8
* [RISCV] Add support for disassemblyAlex Bradbury2017-09-171-0/+135
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