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path: root/llvm/lib/Target/R600
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* R600: Use SIGN_EXTEND_INREG for SEXT loadsJan Vesely2015-05-261-6/+3
* R600: Add comments to subword private address load lowering codeJan Vesely2015-05-261-0/+13
* R600/SI: Add assembler support for all CI and VI VOP2 instructionsTom Stellard2015-05-263-3/+70
* Use std::bitset for SubtargetFeatures.Michael Kuperstein2015-05-262-3/+3
* Remove most uses of MCSectionData from MCAssembler.Rafael Espindola2015-05-261-1/+1
* Turn MCSectionData into a field of MCSection.Rafael Espindola2015-05-251-1/+1
* R600/SI: Remove some unnecessary patterns from VINTRP multiclassTom Stellard2015-05-252-11/+9
* R600/SI: Fix bug with v_interp_p1_f32 instructions on 16 bank lds chipsTom Stellard2015-05-255-10/+50
* R600/SI: Use NAME rather than opName as the key to the MCOpcode tablesTom Stellard2015-05-252-7/+7
* Add target hook to allow merging stores of nonzero constantsMatt Arsenault2015-05-242-0/+10
* Move alignment from MCSectionData to MCSection.Rafael Espindola2015-05-211-3/+3
* Simplify IRBuilder::CreateCall* by using ArrayRef+initializer_list/braced ini...David Blaikie2015-05-181-6/+5
* MC: Clean up method names in MCContext.Jim Grosbach2015-05-184-6/+6
* MC: MCCodeGenInfo naming update. NFC.Jim Grosbach2015-05-151-1/+1
* MC: Update MCCodeEmitter naming. NFC.Jim Grosbach2015-05-153-5/+5
* MC: Update MCFixup naming. NFC.Jim Grosbach2015-05-151-2/+2
* MC: Modernize MCOperand API naming. NFC.Jim Grosbach2015-05-132-12/+12
* Reverting r237234, "Use std::bitset for SubtargetFeatures"Michael Kuperstein2015-05-132-3/+3
* Use std::bitset for SubtargetFeaturesMichael Kuperstein2015-05-132-3/+3
* R600/SI: Fix bug in VGPR spillingTom Stellard2015-05-125-76/+69
* R600/SI: add pass to mark CF live ranges as non-spillableTom Stellard2015-05-124-0/+110
* R600/SI: Update tablegen defs to avoid restoring spilled sgprs to m0Tom Stellard2015-05-122-9/+4
* R600/SI: Remove M0Reg register classTom Stellard2015-05-123-4/+1
* R600/SI: Remove explicit m0 operand from DS instructionsTom Stellard2015-05-126-118/+259
* R600/SI: Remove explicit m0 operand from v_interp instructionsTom Stellard2015-05-126-33/+59
* R600/SI: Remove explicit m0 operand from s_sendmsgTom Stellard2015-05-126-8/+36
* R600/SI: Replace TRI->getRegClass(Reg) with TRI->getPhysRegClass(Reg)Tom Stellard2015-05-123-7/+11
* MachineCSE: Add a target query for the LookAheadLimit heurisiticTom Stellard2015-05-091-0/+2
* Change getTargetNodeName() to produce compiler warnings for missing cases, fi...Matthias Braun2015-05-072-3/+11
* R600: Fix comment that mentions AMDILMatt Arsenault2015-05-071-2/+2
* [X86] Disable loop unrolling in loop vectorization pass when VF is 1.Wei Mi2015-05-062-2/+2
* [ShrinkWrap] Add (a simplified version) of shrink-wrapping.Quentin Colombet2015-05-052-4/+3
* R600/SI: Code cleanupTom Stellard2015-05-041-3/+2
* R600/SI: Add VCC as an implict def of SI_KILLTom Stellard2015-05-011-3/+6
* R600/SI: Fix verifier errors from the SIAnnotateControlFlow passTom Stellard2015-05-011-1/+9
* Reinstate revisions r234755, r234759, r234760Jan Vesely2015-04-307-2/+60
* R600: Fix up for AsmPrinter's OutStreamer being a unique_ptrTom Stellard2015-04-281-2/+3
* R600/SI: Add a lower case alias for subtarget feature: +DumpCodeTom Stellard2015-04-281-0/+5
* Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes"Sergey Dmitrouk2015-04-287-343/+386
* Revert "[DebugInfo] Add debug locations to constant SD nodes"Daniel Jasper2015-04-287-386/+343
* [DebugInfo] Add debug locations to constant SD nodesSergey Dmitrouk2015-04-287-343/+386
* [AsmPrinter] Make AsmPrinter's OutStreamer member a unique_ptr.Lang Hames2015-04-242-97/+99
* R600/SI: Fix verifier error when producing v_madmk_f32Matt Arsenault2015-04-241-0/+3
* R600/RegisterCoalescer: Enable more rematerialization/add missing testcaseMatthias Braun2015-04-241-2/+2
* R600/SI: Special case v_mov_b32 as really rematerializableMatt Arsenault2015-04-232-0/+17
* R600: Correctly lower CONCAT_VECTOR nodes with more than 2 operandsTom Stellard2015-04-231-4/+2
* R600/SI: Fix indirect addressing with a negative constant offsetTom Stellard2015-04-231-16/+55
* R600/SI: Add assembler support for all CI and VI VOP1 instructionsTom Stellard2015-04-236-11/+71
* R600/SI: v_mov_fed_b32 does not exist on VITom Stellard2015-04-231-1/+1
* R600/SI: Use a better error message for unsupported instructions in the assem...Tom Stellard2015-04-231-1/+1
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