Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | R600 -> AMDGPU rename | Tom Stellard | 2015-06-13 | 1 | -421/+0 |
* | R600/SI: Remove explicit m0 operand from DS instructions | Tom Stellard | 2015-05-12 | 1 | -21/+17 |
* | Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. | Benjamin Kramer | 2015-03-23 | 1 | -0/+1 |
* | R600/SI: Move gds operand to the end of operand list | Tom Stellard | 2015-03-09 | 1 | -2/+2 |
* | Reuse a bunch of cached subtargets and remove getSubtarget calls | Eric Christopher | 2015-01-30 | 1 | -17/+7 |
* | R600/SI: Fix live range error hidden by SIFoldOperands | Matt Arsenault | 2014-12-03 | 1 | -0/+9 |
* | R600/SI: Emit s_mov_b32 m0, -1 before every DS instruction | Tom Stellard | 2014-11-21 | 1 | -1/+9 |
* | Work around bugs in MSVC "14" CTP 3's conversion logic | Reid Kleckner | 2014-10-31 | 1 | -2/+2 |
* | R600/SI: Match read2/write2 stride 64 versions | Matt Arsenault | 2014-10-10 | 1 | -38/+80 |
* | R600/SI: Add load / store machine optimizer pass. | Matt Arsenault | 2014-10-10 | 1 | -0/+375 |