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path: root/llvm/lib/Target/R600/R600RegisterInfo.td
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* R600 -> AMDGPU renameTom Stellard2015-06-131-252/+0
* R600: Use LDS and vectors for private memoryTom Stellard2014-06-171-3/+45
* R600: Simplify handling of private address spaceTom Stellard2013-10-221-32/+0
* R600: Enable -verify-machineinstrs in some tests.Vincent Lejeune2013-10-011-2/+3
* R600: Don't use trans slot for instructions that read LDS source registersTom Stellard2013-09-121-1/+9
* R600: Add 64-bit float load/store supportTom Stellard2013-08-011-0/+16
* R600: Simplify assembly for KCache registers using the TableGen !add operatorTom Stellard2013-07-231-4/+4
* R600: Support schedule and packetization of trans-only instVincent Lejeune2013-06-291-0/+1
* R600: Add local memory support via LDSTom Stellard2013-06-281-1/+2
* R600: use capital letter for PV channelVincent Lejeune2013-06-031-4/+4
* R600: Rename 128 bit registers.Vincent Lejeune2013-05-171-1/+1
* R600: Prettier asmPrint of AluVincent Lejeune2013-05-021-3/+3
* R600: use native for aluVincent Lejeune2013-04-301-1/+4
* R600: Packetize instructionsVincent Lejeune2013-04-301-1/+4
* R600: Emit CF_ALU and use true kcache register.Vincent Lejeune2013-04-011-0/+63
* R600: Add AR_X to the R600_TReg_X register class.Tom Stellard2013-02-191-1/+1
* R600: Increase number of ArrayBase Reg to 32Vincent Lejeune2013-02-181-2/+2
* R600: Consolidate sub register indices.Tom Stellard2013-02-071-4/+3
* R600: Support for indirect addressing v4Tom Stellard2013-02-061-0/+46
* R600: rework handling of the constantsTom Stellard2013-01-231-16/+10
* Add R600 backendTom Stellard2012-12-111-0/+107
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