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path: root/llvm/lib/Target/R600/Processors.td
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* R600 -> AMDGPU renameTom Stellard2015-06-131-137/+0
| | | | llvm-svn: 239657
* R600/SI: Fix bug with v_interp_p1_f32 instructions on 16 bank lds chipsTom Stellard2015-05-251-5/+12
| | | | | | The src and dst register cannot be the same on chips with 16 lds banks. llvm-svn: 238147
* R600/SI: Limit SGPRs to 80 on Tonga and IcelandMarek Olsak2015-03-091-2/+6
| | | | | | This is a candidate for stable. llvm-svn: 231659
* R600/SI: Add subtarget feature for if f32 fma is fastMatt Arsenault2015-01-291-3/+9
| | | | llvm-svn: 227483
* R600/SI: Fix tonga's basic scheduling modelMatt Arsenault2015-01-291-1/+1
| | | | llvm-svn: 227482
* R600/SI: Define a schedule modelTom Stellard2015-01-141-14/+18
| | | | | | | | The machine scheduler is still disabled by default. The schedule model is not complete yet, and could be improved. llvm-svn: 225913
* R600/SI: Add VI instructionsMarek Olsak2014-12-071-0/+6
| | | | llvm-svn: 223603
* R600/SI: Add processor type for Mullins.Tom Stellard2014-05-021-0/+2
| | | | | | | Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> llvm-svn: 207846
* R600: Recommit 199842: Add work-around for the CF stack entry HW bugTom Stellard2014-01-231-6/+8
| | | | | | | | | | | | | | | | | | The unit test is now disabled on non-asserts builds. The CF stack can be corrupted if you use CF_ALU_PUSH_BEFORE, CF_ALU_ELSE_AFTER, CF_ALU_BREAK, or CF_ALU_CONTINUE when the number of sub-entries on the stack is greater than or equal to the stack entry size and sub-entries modulo 4 is either 0 or 3 (on cedar the bug is present when number of sub-entries module 8 is either 7 or 0) We choose to be conservative and always apply the work-around when the number of sub-enries is greater than or equal to the stack entry size, so that we can safely over-allocate the stack when we are unsure of the stack allocation rules. reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 199905
* Revert "R600: Add work-around for the CF stack entry HW bug"Tom Stellard2014-01-221-8/+6
| | | | | | | | | This reverts commit 35b8331cad6eb512a2506adbc394201181da94ba. The -debug-only flag for llc doesn't appear to be available in all build configurations. llvm-svn: 199845
* R600: Add work-around for the CF stack entry HW bugTom Stellard2014-01-221-6/+8
| | | | | | | | | | | | | | | | The CF stack can be corrupted if you use CF_ALU_PUSH_BEFORE, CF_ALU_ELSE_AFTER, CF_ALU_BREAK, or CF_ALU_CONTINUE when the number of sub-entries on the stack is greater than or equal to the stack entry size and sub-entries modulo 4 is either 0 or 3 (on cedar the bug is present when number of sub-entries module 8 is either 7 or 0) We choose to be conservative and always apply the work-around when the number of sub-enries is greater than or equal to the stack entry size, so that we can safely over-allocate the stack when we are unsure of the stack allocation rules. reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 199842
* R600: Add wavefront size property to the subtargets v2Tom Stellard2014-01-221-11/+15
| | | | | | | | v2: - Initialize wavefront size to 0 reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 199838
* R600: Re-format Processors.tdTom Stellard2013-12-111-0/+48
| | | | | | | This makes it a little easier to read. Reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 197058
* R600/SI: Add processor type for HawaiiTom Stellard2013-11-141-0/+1
| | | | | | | | Patch by: Alex Deucher Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> llvm-svn: 194752
* R600/SI: Add compute support for CI v2Tom Stellard2013-10-291-3/+3
| | | | | | | | v2: - Fix LDS size calculation Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> llvm-svn: 193621
* Add a newline.Chad Rosier2013-07-011-1/+1
| | | | llvm-svn: 185385
* R600/SI: Add processor types for each CIK variantTom Stellard2013-06-281-0/+3
| | | | | | | | Patch By: Alex Deucher Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> llvm-svn: 185209
* R600: Rework subtarget info and remove AMDILDevice classesTom Stellard2013-06-071-22/+22
| | | | | | | | This should simplify the subtarget definitions and make it easier to add new ones. Reviewed-by: Vincent Lejeune <vljn@ovi.com> llvm-svn: 183566
* R600: Fix the fetch limits for R600 generation GPUsTom Stellard2013-06-071-16/+18
| | | | | | | | Reviewed-by: Vincent Lejeune <vljn@ovi.com> https://bugs.freedesktop.org/show_bug.cgi?id=64257 llvm-svn: 183560
* R600/SI: Add processor type for Hainan asicTom Stellard2013-05-141-0/+1
| | | | | | | | | | Patch by: Alex Deucher Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> NOTE: This is a candidate for the 3.3 branch. llvm-svn: 181792
* R600: Clean up comments in Processors.tdTom Stellard2013-05-031-5/+1
| | | | llvm-svn: 181032
* R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chipsVincent Lejeune2013-04-301-16/+16
| | | | llvm-svn: 180759
* R600: Add FetchInst bit to instruction defs to denote vertex/tex instructionsVincent Lejeune2013-04-301-17/+32
| | | | | | v2[Vincent Lejeune]: Split FetchInst into usesTextureCache/usesVertexCache llvm-svn: 180755
* R600: Add some new processor variantsVincent Lejeune2013-04-301-0/+2
| | | | llvm-svn: 180753
* R600: Add RV670 processorTom Stellard2013-04-051-0/+1
| | | | | | | This is an R600 GPU with double support. Reviewed-by: Christian König <christian.koenig@amd.com> llvm-svn: 178929
* R600/SI: Add processor types for each SI variantTom Stellard2013-04-051-2/+5
| | | | | Reviewed-by: Christian König <christian.koenig@amd.com> llvm-svn: 178928
* R600: Add an explicit default processorTom Stellard2013-02-071-0/+1
| | | | | | | | | | | This is for the case when no processor is passed to the backend. This prevents the '' is not a recognized processor for this target (ignoring processor) warning from being generated by clang. llvm-svn: 174651
* Add R600 backendTom Stellard2012-12-111-0/+29
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX llvm-svn: 169915
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