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path: root/llvm/lib/Target/R600/AMDILISelLowering.cpp
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* R600: Remove AMDILISelLoweringMatt Arsenault2014-06-231-35/+0
| | | | llvm-svn: 211519
* R600: Move add/sub with overflow out of AMDILISelLoweringMatt Arsenault2014-06-231-19/+0
| | | | | | Add more tests for these. llvm-svn: 211517
* R600: Move more out of AMDILISelLoweringMatt Arsenault2014-06-231-36/+3
| | | | llvm-svn: 211516
* R600: Don't set fp_round_inreg action.Matt Arsenault2014-06-231-9/+0
| | | | | | | There's no point in setting this since it seems to only by created in 1 place for ppcf128 llvm-svn: 211515
* R600: Remove a few more things from AMDILISelLoweringMatt Arsenault2014-06-151-8/+0
| | | | | | | Try to keep all the setOperationActions for integer ops together. llvm-svn: 211001
* R600: Move / cleanup more leftover AMDIL stuff.Matt Arsenault2014-06-151-48/+0
| | | | llvm-svn: 210998
* R600: Move division custom lowering out of AMDILISelLoweringMatt Arsenault2014-06-151-262/+3
| | | | llvm-svn: 210997
* R600: Remove dead codeMatt Arsenault2014-06-151-72/+11
| | | | llvm-svn: 210994
* R600: Cleanup some old AMDIL stuff.Matt Arsenault2014-06-131-86/+11
| | | | | | | | | | | | Move / delete some of the more obviously wrong setOperationAction calls. Most of these are setting Expand for types that aren't legal which is the default anyway. Leave stuff that might require more thought on whether it's junk or not as it is. No functionality change. llvm-svn: 210922
* R600: Don't call setOperationAction with things that aren't opcodes.Matt Arsenault2014-06-131-8/+0
| | | | | | | | | CondCode actions are set with setCondCodeAction. This should have been a harmless bug since the values seem to only collide only with nodes that don't need to be handled, and these are already correctly setup elsewhere. llvm-svn: 210888
* R600/SI: Use bcnt instruction for ctpopMatt Arsenault2014-06-101-5/+0
| | | | llvm-svn: 210567
* Use range forMatt Arsenault2014-05-151-52/+40
| | | | llvm-svn: 208922
* R600: Move computeMaskedBitsForTargetNode out of AMDILISelLowering.cppMatt Arsenault2014-03-251-35/+0
| | | | | | | | Remove handling of select_cc, since it makes no sense to be there. This now does nothing, but I'll be adding some handling of other target nodes soon. llvm-svn: 204743
* R600: Match sign_extend_inreg to BFE instructionsMatt Arsenault2014-03-171-35/+0
| | | | llvm-svn: 204072
* Make some arrays 'static const'Craig Topper2013-07-151-4/+4
| | | | llvm-svn: 186307
* Use llvm::array_lengthof to replace sizeof(array)/sizeof(array[0]).Craig Topper2013-07-151-4/+4
| | | | llvm-svn: 186301
* R600: Rework subtarget info and remove AMDILDevice classesTom Stellard2013-06-071-16/+13
| | | | | | | | This should simplify the subtarget definitions and make it easier to add new ones. Reviewed-by: Vincent Lejeune <vljn@ovi.com> llvm-svn: 183566
* Track IR ordering of SelectionDAG nodes 2/4.Andrew Trick2013-05-251-7/+7
| | | | | | | Change SelectionDAG::getXXXNode() interfaces as well as call sites of these functions to pass in SDLoc instead of DebugLoc. llvm-svn: 182703
* R600: Swap the legality of rotl and rotrTom Stellard2013-05-201-2/+0
| | | | | | The hardware supports rotr and not rotl. llvm-svn: 182285
* R600/SI: add proper formal parameter handling for SIChristian Konig2013-03-071-5/+0
| | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 176623
* R600: Update for name changes from r175667.Jim Grosbach2013-02-201-3/+3
| | | | llvm-svn: 175668
* R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad patternVincent Lejeune2013-02-181-1/+2
| | | | llvm-svn: 175446
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-4/+4
| | | | | | | | | | | | | | | | | | | | | into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. llvm-svn: 171366
* Resort the #include lines in include/... and lib/... with theChandler Carruth2013-01-021-1/+1
| | | | | | | | | | utils/sort_includes.py script. Most of these are updating the new R600 target and fixing up a few regressions that have creeped in since the last time I sorted the includes. llvm-svn: 171362
* R600: remove nonsense setPrefLoopAlignmentTom Stellard2012-12-171-1/+0
| | | | | | | | | | | | | The Align parameter is a power of two, so 16 results in 64K alignment. Additional to that even 16 byte alignment doesn't make any sense, so just remove it. Patch by: Christian König Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Tested-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Christian König <deathsimple@vodafone.de> llvm-svn: 170341
* Add R600 backendTom Stellard2012-12-111-0/+652
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX llvm-svn: 169915
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