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| author | Andrew Trick <atrick@apple.com> | 2013-05-25 02:42:55 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2013-05-25 02:42:55 +0000 |
| commit | ef9de2a7397179bba9a272502dce41173d53985c (patch) | |
| tree | 014fc84fce92ac0635c6a649acdd9dd206a29512 /llvm/lib/Target/R600/AMDILISelLowering.cpp | |
| parent | f3dcb68d76dacd35f5ca0e0b0aeb7e9f447c4020 (diff) | |
| download | bcm5719-llvm-ef9de2a7397179bba9a272502dce41173d53985c.tar.gz bcm5719-llvm-ef9de2a7397179bba9a272502dce41173d53985c.zip | |
Track IR ordering of SelectionDAG nodes 2/4.
Change SelectionDAG::getXXXNode() interfaces as well as call sites of
these functions to pass in SDLoc instead of DebugLoc.
llvm-svn: 182703
Diffstat (limited to 'llvm/lib/Target/R600/AMDILISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/R600/AMDILISelLowering.cpp | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/llvm/lib/Target/R600/AMDILISelLowering.cpp b/llvm/lib/Target/R600/AMDILISelLowering.cpp index e20dbe02790..0168906bf6d 100644 --- a/llvm/lib/Target/R600/AMDILISelLowering.cpp +++ b/llvm/lib/Target/R600/AMDILISelLowering.cpp @@ -329,7 +329,7 @@ SDValue AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const { SDValue Data = Op.getOperand(0); VTSDNode *BaseType = cast<VTSDNode>(Op.getOperand(1)); - DebugLoc DL = Op.getDebugLoc(); + SDLoc DL(Op); EVT DVT = Data.getValueType(); EVT BVT = BaseType->getVT(); unsigned baseBits = BVT.getScalarType().getSizeInBits(); @@ -385,7 +385,7 @@ AMDGPUTargetLowering::LowerBRCOND(SDValue Op, SelectionDAG &DAG) const { SDValue Result; Result = DAG.getNode( AMDGPUISD::BRANCH_COND, - Op.getDebugLoc(), + SDLoc(Op), Op.getValueType(), Chain, Jump, Cond); return Result; @@ -393,7 +393,7 @@ AMDGPUTargetLowering::LowerBRCOND(SDValue Op, SelectionDAG &DAG) const { SDValue AMDGPUTargetLowering::LowerSDIV24(SDValue Op, SelectionDAG &DAG) const { - DebugLoc DL = Op.getDebugLoc(); + SDLoc DL(Op); EVT OVT = Op.getValueType(); SDValue LHS = Op.getOperand(0); SDValue RHS = Op.getOperand(1); @@ -474,7 +474,7 @@ AMDGPUTargetLowering::LowerSDIV24(SDValue Op, SelectionDAG &DAG) const { SDValue AMDGPUTargetLowering::LowerSDIV32(SDValue Op, SelectionDAG &DAG) const { - DebugLoc DL = Op.getDebugLoc(); + SDLoc DL(Op); EVT OVT = Op.getValueType(); SDValue LHS = Op.getOperand(0); SDValue RHS = Op.getOperand(1); @@ -545,7 +545,7 @@ AMDGPUTargetLowering::LowerSDIV64(SDValue Op, SelectionDAG &DAG) const { SDValue AMDGPUTargetLowering::LowerSREM8(SDValue Op, SelectionDAG &DAG) const { - DebugLoc DL = Op.getDebugLoc(); + SDLoc DL(Op); EVT OVT = Op.getValueType(); MVT INTTY = MVT::i32; if (OVT == MVT::v2i8) { @@ -562,7 +562,7 @@ AMDGPUTargetLowering::LowerSREM8(SDValue Op, SelectionDAG &DAG) const { SDValue AMDGPUTargetLowering::LowerSREM16(SDValue Op, SelectionDAG &DAG) const { - DebugLoc DL = Op.getDebugLoc(); + SDLoc DL(Op); EVT OVT = Op.getValueType(); MVT INTTY = MVT::i32; if (OVT == MVT::v2i16) { @@ -579,7 +579,7 @@ AMDGPUTargetLowering::LowerSREM16(SDValue Op, SelectionDAG &DAG) const { SDValue AMDGPUTargetLowering::LowerSREM32(SDValue Op, SelectionDAG &DAG) const { - DebugLoc DL = Op.getDebugLoc(); + SDLoc DL(Op); EVT OVT = Op.getValueType(); SDValue LHS = Op.getOperand(0); SDValue RHS = Op.getOperand(1); |
