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path: root/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
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* PowerPC: Fix register spilling for SPE registersJustin Hibbits2019-07-171-21/+34
* PowerPC/SPE: Fix load/store handling for SPEJustin Hibbits2019-07-171-1/+7
* CodeGen: Introduce a class for registersMatt Arsenault2019-06-241-2/+2
* [AIX] Implement call lowering with parameters could pass onto GPRsJason Liu2019-06-061-0/+5
* Include what you use in PPCRegisterInfo.cppDmitri Gribenko2019-06-041-1/+0
* Implement call lowering without parameters on AIXJason Liu2019-05-241-0/+4
* [PowerPC] Custom lower known CR bit spillsLei Huang2019-05-141-16/+55
* [PowerPC] Move the stack pointer update instruction later in the prologue and...Stefan Pintilie2019-02-281-4/+55
* Implementation of asm-goto support in LLVMCraig Topper2019-02-081-1/+2
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [PowerPC] Fix CR Bit spill pseudo expansionNemanja Ivanovic2018-12-291-5/+8
* Remove trailing spaceFangrui Song2018-07-301-1/+1
* Introduce codegen for the Signal Processing EngineJustin Hibbits2018-07-181-0/+11
* Re-commit: [MachineLICM] Add functions to MachineLICM to hoist invariant storesZaara Syeda2018-03-231-4/+21
* Revert [MachineLICM] This reverts commit rL327856Zaara Syeda2018-03-191-21/+4
* [MachineLICM] Add functions to MachineLICM to hoist invariant storesZaara Syeda2018-03-191-4/+21
* Re-commit : [PowerPC] Add handling for ColdCC calling convention and a pass t...Zaara Syeda2018-01-301-0/+18
* Revert [PowerPC] This reverts commit rL322721Zaara Syeda2018-01-171-18/+0
* [PowerPC] Add handling for ColdCC calling convention and a pass to markZaara Syeda2018-01-171-0/+18
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-3/+3
* Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie2017-11-081-2/+2
* Move TargetFrameLowering.h to CodeGen where it's implementedDavid Blaikie2017-11-031-1/+1
* [PowerPC] Utilize DQ-Form instructions for spill/restore and fix FrameIndex e...Lei Huang2017-10-111-5/+10
* [Power9] Spill gprs to vector registers rather than stackZaara Syeda2017-09-211-0/+22
* [PowerPC] Ensure displacements for DQ-Form instructions are multiples of 16Nemanja Ivanovic2017-07-131-10/+20
* [PowerPC] fix potential verification errorsHiroshi Inoue2017-06-221-4/+11
* [MachineLICM] Hoist TOC-based address instructionsLei Huang2017-06-151-0/+14
* PowerPC: Slight cleanup of getReservedRegs(); NFCMatthias Braun2017-01-251-19/+10
* PowerPC: Mark super regs of reserved regs reserved.Matthias Braun2017-01-241-35/+25
* [Power9] Exploit D-Form VSX Scalar memory ops that target full VSX register setNemanja Ivanovic2016-10-041-0/+12
* [Power9] Part-word VSX integer scalar loads/stores and sign extend instructionsNemanja Ivanovic2016-10-041-1/+0
* MachineFunction: Return reference for getFrameInfo(); NFCMatthias Braun2016-07-281-9/+9
* Use isPositionIndependent in a few more places.Rafael Espindola2016-06-281-3/+2
* Refactor duplicated condition.Rafael Espindola2016-06-271-4/+3
* CXX_FAST_TLS calling convention: performance improvement for PPC64Chuang-Yu Cheng2016-04-081-0/+28
* Introduce new @llvm.get.dynamic.area.offset.i{32, 64} intrinsics.Yury Gribov2015-12-011-0/+26
* Fix typos in comments.Jay Foad2015-11-171-1/+1
* Prune trailing whitespaces.NAKAMURA Takumi2015-09-221-1/+1
* Untabify.NAKAMURA Takumi2015-09-221-8/+7
* Reformat blank lines.NAKAMURA Takumi2015-09-221-5/+5
* Reformat comment lines.NAKAMURA Takumi2015-09-221-6/+7
* Reformat.NAKAMURA Takumi2015-09-221-13/+15
* Targets: commonize some stack realignment codeJF Bastien2015-07-201-18/+0
* Target RegisterInfo: devirtualize TargetFrameLoweringJF Bastien2015-07-101-17/+11
* Add VSX Scalar loads and stores to the PPC back endNemanja Ivanovic2015-05-071-0/+3
* Add Hardware Transactional Memory (HTM) SupportKit Barton2015-03-251-31/+0
* [ARM] Fix handling of thumb1 out-of-range frame offsetsJohn Brawn2015-03-201-1/+2
* Remove the need to cache the subtarget in the PowerPC TargetRegisterInfoEric Christopher2015-03-121-52/+65
* Have getCallPreservedMask and getThisCallPreservedMask take aEric Christopher2015-03-111-2/+3
* Have TargetRegisterInfo::getLargestLegalSuperClass take aEric Christopher2015-03-101-3/+4
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