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| author | Rafael Espindola <rafael.espindola@gmail.com> | 2016-06-27 18:09:22 +0000 |
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2016-06-27 18:09:22 +0000 |
| commit | 8bba560064e97f8ce7de746c196d4931ee1289bf (patch) | |
| tree | 67dbe4f9cbe3ff670e487c70247376f38f386c75 /llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | |
| parent | ad3929cc64a0104b186901a2192d1ce5acfd59c9 (diff) | |
| download | bcm5719-llvm-8bba560064e97f8ce7de746c196d4931ee1289bf.tar.gz bcm5719-llvm-8bba560064e97f8ce7de746c196d4931ee1289bf.zip | |
Refactor duplicated condition.
llvm-svn: 273900
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp index 5fef2924afe..5ea0eafff09 100644 --- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -260,16 +260,15 @@ BitVector PPCRegisterInfo::getReservedRegs(const MachineFunction &MF) const { if (TFI->needsFP(MF)) Reserved.set(PPC::R31); + bool IsPositionIndependent = TM.getRelocationModel() == Reloc::PIC_; if (hasBasePointer(MF)) { - if (Subtarget.isSVR4ABI() && !TM.isPPC64() && - TM.getRelocationModel() == Reloc::PIC_) + if (Subtarget.isSVR4ABI() && !TM.isPPC64() && IsPositionIndependent) Reserved.set(PPC::R29); else Reserved.set(PPC::R30); } - if (Subtarget.isSVR4ABI() && !TM.isPPC64() && - TM.getRelocationModel() == Reloc::PIC_) + if (Subtarget.isSVR4ABI() && !TM.isPPC64() && IsPositionIndependent) Reserved.set(PPC::R30); // Reserve Altivec registers when Altivec is unavailable. |
