| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [PPC64] Add support for clrbhrb, mfbhrbe, rfebb. | Bill Schmidt | 2015-05-22 | 1 | -0/+26 |
| * | [PowerPC] Add asm/disasm support for dcbt with hint | Hal Finkel | 2015-04-23 | 1 | -0/+15 |
| * | Add direct moves to/from VSR and exploit them for FP/INT conversions | Nemanja Ivanovic | 2015-04-11 | 1 | -0/+6 |
| * | Add Hardware Transactional Memory (HTM) Support | Kit Barton | 2015-03-25 | 1 | -0/+54 |
| * | Add LLVM support for PPC cryptography builtins | Nemanja Ivanovic | 2015-03-04 | 1 | -0/+33 |
| * | [PowerPC] Add support for the QPX vector instruction set | Hal Finkel | 2015-02-25 | 1 | -0/+92 |
| * | [PowerPC] Add assembler support for mcrfs and friends | Hal Finkel | 2015-01-15 | 1 | -0/+38 |
| * | [PowerPC] Ensure that the TOC reload directly follows bctrl on PPC64 | Hal Finkel | 2014-12-23 | 1 | -0/+39 |
| * | [PowerPC] Add the 'attn' instruction | Hal Finkel | 2014-11-25 | 1 | -0/+6 |
| * | [PowerPC] Add support for dcbtst and icbt (prefetch) | Hal Finkel | 2014-08-23 | 1 | -0/+15 |
| * | tlbre / tlbwe / tlbsx / tlbsx. variants for the PPC 4xx CPUs. | Joerg Sonnenberger | 2014-08-04 | 1 | -0/+16 |
| * | Don't use additional arguments for dss and friends to satisfy DSS_Form, | Joerg Sonnenberger | 2014-08-02 | 1 | -2/+1 |
| * | Refactor TLBIVAX and add tlbsx. | Joerg Sonnenberger | 2014-07-30 | 1 | -0/+5 |
| * | Recognize BookE's mbar instruction. | Joerg Sonnenberger | 2014-07-29 | 1 | -0/+9 |
| * | Support move to/from segment register. | Joerg Sonnenberger | 2014-07-29 | 1 | -0/+22 |
| * | [PowerPC] Simplify and improve loading into TOC register | Ulrich Weigand | 2014-06-18 | 1 | -14/+0 |
| * | [PowerPC] Initial support for the VSX instruction set | Hal Finkel | 2014-03-13 | 1 | -0/+167 |
| * | Add CR-bit tracking to the PowerPC backend for i1 values | Hal Finkel | 2014-02-28 | 1 | -0/+19 |
| * | Add a disassembler to the PowerPC backend | Hal Finkel | 2013-12-19 | 1 | -0/+4 |
| * | Improve instruction scheduling for the PPC POWER7 | Hal Finkel | 2013-12-12 | 1 | -0/+9 |
| * | Add IIC_ prefix to PPC instruction-class names | Hal Finkel | 2013-11-27 | 1 | -3/+3 |
| * | Implement asm support for a few PowerPC bookIII that are needed for assembling | Roman Divacky | 2013-09-12 | 1 | -0/+33 |
| * | [PowerPC] Support "eieio" instruction | Ulrich Weigand | 2013-07-01 | 1 | -0/+6 |
| * | [PowerPC] Add variants of "sync" instruction | Ulrich Weigand | 2013-07-01 | 1 | -1/+4 |
| * | [PowerPC] Support generic conditional branches in asm parser | Ulrich Weigand | 2013-06-24 | 1 | -0/+14 |
| * | Implement the PowerPC system call (sc) instruction. | Bill Schmidt | 2013-05-14 | 1 | -0/+13 |
| * | [PowerPC] Add some Book II instructions to AsmParser | Ulrich Weigand | 2013-05-03 | 1 | -0/+6 |
| * | PowerPC: Fix encoding of rldimi and rldcl instructions | Ulrich Weigand | 2013-04-26 | 1 | -0/+19 |
| * | Add a comment about the PPC Interpretation64Bit bit | Hal Finkel | 2013-04-12 | 1 | -0/+5 |
| * | Add PPC instruction record forms and associated query functions | Hal Finkel | 2013-04-12 | 1 | -1/+14 |
| * | Generate PPC early conditional returns | Hal Finkel | 2013-04-08 | 1 | -3/+3 |
| * | PowerPC: Mark patterns as isCodeGenOnly. | Ulrich Weigand | 2013-03-26 | 1 | -0/+1 |
| * | PowerPC: Simplify FADD in round-to-zero mode. | Ulrich Weigand | 2013-03-26 | 1 | -2/+1 |
| * | PowerPC: Use CCBITRC operand for ISEL patterns. | Ulrich Weigand | 2013-03-26 | 1 | -4/+2 |
| * | Implement builtin_{setjmp/longjmp} on PPC | Hal Finkel | 2013-03-21 | 1 | -0/+12 |
| * | Fix wrong PowerPC instruction encodings due to | Ulrich Weigand | 2012-11-13 | 1 | -4/+4 |
| * | Fix instruction encoding for "bd(n)z" on PowerPC, | Ulrich Weigand | 2012-11-13 | 1 | -6/+7 |
| * | Fix instruction encoding for "isel" on PowerPC, | Ulrich Weigand | 2012-11-13 | 1 | -0/+20 |
| * | Add the PPCCTRLoops pass: a PPC machine-code-level optimization pass to form ... | Hal Finkel | 2012-06-08 | 1 | -0/+6 |
| * | Fix dynamic linking on PPC64. | Hal Finkel | 2012-03-31 | 1 | -0/+59 |
| * | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -2/+2 |
| * | split out an encoder for memri operands, allowing a relocation to be plopped | Chris Lattner | 2010-11-15 | 1 | -2/+15 |
| * | add support for encoding the lo14 forms used for a few PPC64 addressing | Chris Lattner | 2010-11-15 | 1 | -4/+18 |
| * | Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field. | Jakob Stoklund Olesen | 2010-04-05 | 1 | -3/+8 |
| * | Implement __sync_synchronize on ppc32. Patch by Gary Benson. | Dale Johannesen | 2008-08-22 | 1 | -0/+11 |
| * | Implement ISD::TRAP support on PPC | Nate Begeman | 2008-08-11 | 1 | -0/+11 |
| * | no need to explicitly clear these fields. | Chris Lattner | 2008-01-07 | 1 | -1/+0 |
| * | Remove attribution from file headers, per discussion on llvmdev. | Chris Lattner | 2007-12-29 | 1 | -2/+2 |
| * | Next PPC long double bits: ppcf128->i32 conversion. | Dale Johannesen | 2007-10-10 | 1 | -0/+49 |
| * | Change instruction description to split OperandList into OutOperandList and | Evan Cheng | 2007-07-19 | 1 | -130/+135 |
