| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [IR][CodeGen] Remove dependency on EVT from IR/Function.cpp. Move EVT to Code... | Craig Topper | 2018-03-29 | 1 | -1/+1 |
| * | Fix layering by moving ValueTypes.h from CodeGen to IR | David Blaikie | 2018-03-23 | 1 | -1/+1 |
| * | Fix layering of MachineValueType.h by moving it from CodeGen to Support | David Blaikie | 2018-03-23 | 1 | -1/+1 |
| * | [PowerPC] Make AddrSpaceCast noop | Nemanja Ivanovic | 2018-03-19 | 1 | -0/+5 |
| * | [PowerPC] Zero-extend the compare operand for ATOMIC_CMP_SWAP | Nemanja Ivanovic | 2018-01-12 | 1 | -0/+6 |
| * | MachineFunction: Return reference from getFunction(); NFC | Matthias Braun | 2017-12-15 | 1 | -2/+2 |
| * | TLI: Allow using PSV for intrinsic mem operands | Matt Arsenault | 2017-12-14 | 1 | -0/+1 |
| * | [CodeGen] Print register names in lowercase in both MIR and debug output | Francis Visoiu Mistrih | 2017-11-28 | 1 | -8/+8 |
| * | Fix a bunch more layering of CodeGen headers that are in Target | David Blaikie | 2017-11-17 | 1 | -1/+1 |
| * | [PowerPC] Implement mayBeEmittedAsTailCall for PPC | Sean Fertile | 2017-11-15 | 1 | -0/+4 |
| * | Adds code to PPC ISEL lowering to recognize byte inserts from vector_shuffles... | Graham Yiu | 2017-11-06 | 1 | -0/+5 |
| * | [PPC] Use xxbrd to speed up bswap64 | Guozhi Wei | 2017-11-06 | 1 | -0/+1 |
| * | Adds code to PPC ISEL lowering to recognize half-word inserts from vector_shu... | Graham Yiu | 2017-11-01 | 1 | -1/+8 |
| * | DAG: Add opcode and source type to isFPExtFree | Matt Arsenault | 2017-10-13 | 1 | -1/+1 |
| * | [PPC][NFC] Renaming things with 'xxinsert' moniker to 'vecinsert' to make it ... | Tony Jiang | 2017-09-05 | 1 | -3/+3 |
| * | [DAG] convert vector select-of-constants to logic/math | Sanjay Patel | 2017-08-24 | 1 | -1/+1 |
| * | Change CallLoweringInfo::CS to be an ImmutableCallSite instead of a pointer. ... | Peter Collingbourne | 2017-07-26 | 1 | -5/+5 |
| * | [NFC] test commit. | Stefan Pintilie | 2017-07-26 | 1 | -0/+8 |
| * | [SystemZ, LoopStrengthReduce] | Jonas Paulsson | 2017-07-21 | 1 | -1/+2 |
| * | [PowerPC] Ensure displacements for DQ-Form instructions are multiples of 16 | Nemanja Ivanovic | 2017-07-13 | 1 | -1/+1 |
| * | fix formatting; NFC | Hiroshi Inoue | 2017-07-10 | 1 | -2/+2 |
| * | [PowerPC] NFC : Common up definitions of isIntS16Immediate and update paramet... | Lei Huang | 2017-07-07 | 1 | -0/+3 |
| * | [Power9] Exploit vector integer extend instructions when indices aren't correct. | Tony Jiang | 2017-07-05 | 1 | -0/+4 |
| * | [PowerPC] Match vec_revb builtins to P9 instructions. | Tony Jiang | 2017-06-12 | 1 | -0/+21 |
| * | [Power9] Added support for the modsw, moduw, modsd, modud hardware instructions. | Tony Jiang | 2017-06-12 | 1 | -0/+1 |
| * | [PowerPC] Fix a performance bug for PPC::XXPERMDI. | Tony Jiang | 2017-05-31 | 1 | -0/+8 |
| * | [PowerPC] Fix a performance bug for PPC::XXSLDWI. | Tony Jiang | 2017-05-24 | 1 | -1/+5 |
| * | [PPC] Lower load acquire/seq_cst trailing fence to cmp + bne + isync. | Tim Shen | 2017-05-16 | 1 | -0/+1 |
| * | [PPC] Move the combine "a << (b % (sizeof(a) * 8)) -> (PPCshl a, b)" to the b... | Tim Shen | 2017-05-12 | 1 | -11/+10 |
| * | [Atomic] Remove IsStore/IsLoad in the interface, and pass the instruction ins... | Tim Shen | 2017-05-09 | 1 | -4/+4 |
| * | [PowerPC, DAGCombiner] Fold a << (b % (sizeof(a) * 8)) back to a single instr... | Tim Shen | 2017-05-03 | 1 | -0/+8 |
| * | [SelectionDAG] Use KnownBits struct in DAG's computeKnownBits and simplifyDem... | Craig Topper | 2017-04-28 | 1 | -2/+1 |
| * | [DAGCombiner] add and use TLI hook to convert and-of-seteq / or-of-setne to b... | Sanjay Patel | 2017-04-05 | 1 | -0/+4 |
| * | [DAGCombiner] Add vector demanded elements support to computeKnownBitsForTarg... | Simon Pilgrim | 2017-03-31 | 1 | -0/+1 |
| * | [DAGCombiner] allow transforming (select Cond, C +/- 1, C) to (add(ext Cond), C) | Sanjay Patel | 2017-03-04 | 1 | -0/+4 |
| * | [PowerPC] Fix some Clang-tidy modernize and Include What You Use warnings; ot... | Eugene Zelenko | 2017-01-13 | 1 | -23/+39 |
| * | [PowerPC] Implement missing ISA 2.06 instructions. | Tony Jiang | 2017-01-05 | 1 | -1/+1 |
| * | [PPC] Prefer direct move on power8 if load 1 or 2 bytes to VSR | Guozhi Wei | 2016-12-12 | 1 | -0/+2 |
| * | [PowerPC] Improvements for BUILD_VECTOR Vol. 2 | Nemanja Ivanovic | 2016-11-29 | 1 | -0/+4 |
| * | [PPC][DAGCombine] Convert SETCC to subtract when the result is zero extended | Ehsan Amiri | 2016-11-18 | 1 | -0/+5 |
| * | Always use relative jump table encodings on PowerPC64. | Joerg Sonnenberger | 2016-11-16 | 1 | -0/+9 |
| * | [DAG Combiner] Fix the native computation of the Newton series for reciprocals | Evandro Menezes | 2016-11-10 | 1 | -3/+3 |
| * | [PPC] Generate positive FP zero using xor insn instead of loading from consta... | Ehsan Amiri | 2016-10-24 | 1 | -0/+1 |
| * | [Target] remove TargetRecip class; 2nd try | Sanjay Patel | 2016-10-20 | 1 | -4/+4 |
| * | revert r284495: [Target] remove TargetRecip class | Sanjay Patel | 2016-10-18 | 1 | -4/+4 |
| * | [Target] remove TargetRecip class; move reciprocal estimate isel functionalit... | Sanjay Patel | 2016-10-18 | 1 | -4/+4 |
| * | [Power9] Part-word VSX integer scalar loads/stores and sign extend instructions | Nemanja Ivanovic | 2016-10-04 | 1 | -0/+14 |
| * | getVectorElementType().getSizeInBits() -> getScalarSizeInBits() ; NFCI | Sanjay Patel | 2016-09-14 | 1 | -1/+1 |
| * | Fix code-gen crash on Power9 for insert_vector_elt with variable index (PR30189) | Nemanja Ivanovic | 2016-09-14 | 1 | -0/+1 |
| * | [CodeGen] Split out the notions of MI invariance and MI dereferenceability. | Justin Lebar | 2016-09-11 | 1 | -1/+13 |
