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path: root/llvm/lib/Target/PowerPC/PPCISelLowering.h
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* [PowerPC] Add missing handling for half precisionTom Stellard2020-06-221-1/+1
* CodeGen: Use LLT instead of EVT in getRegisterByNameMatt Arsenault2020-01-091-1/+1
* [PowerPC][NFC] Rename record instructions to use _rec suffix instead of oJinsong Ji2020-01-061-454/+469
* [Power9] Remove the PPCISD::XXREVERSE as it has completely the same semantics...QingShan Zhang2019-12-231-4/+0
* [PowerPC] Add Support for indirect calls on AIX.Sean Fertile2019-12-131-1/+2
* [PowerPC][AIX] Add support for lowering int/float/double formal arguments.Sean Fertile2019-11-291-0/+4
* DAG: Add function context to isFMAFasterThanFMulAndFAddMatt Arsenault2019-11-191-1/+2
* [CGP] Make ICMP_EQ use CR result of ICMP_S(L|G)T dominatorsYi-Hong Lyu2019-11-111-0/+4
* [PowerPC] Emit scalar fp min/max instructionsNemanja Ivanovic2019-10-281-0/+3
* TLI: Remove DAG argument from getRegisterByNameMatt Arsenault2019-10-011-2/+2
* [Alignment][NFC] Remove unneeded llvm:: scoping on Align typesGuillaume Chatelet2019-09-271-1/+1
* [PowerPC] Exploit single instruction load-and-splat for word and doublewordNemanja Ivanovic2019-09-171-3/+9
* [PowerPC] Cust lower fpext v2f32 to v2f64 from extract_subvector v4f32Nemanja Ivanovic2019-09-161-2/+3
* [Alignment][NFC] Use llvm::Align for TargetLowering::getPrefLoopAlignmentGuillaume Chatelet2019-09-101-1/+1
* [LLVM][Alignment] Make functions using log of alignment explicitGuillaume Chatelet2019-09-051-1/+1
* [AIX]Lowering global address for 32/64bit small/large code modelsXiangling Liao2019-08-131-0/+2
* recommit:[PowerPC] Eliminate loads/swap feeding swap/store for vector type by...Zi Xuan Wu2019-08-011-0/+12
* revert r367382 because buildbot failureZi Xuan Wu2019-07-311-12/+0
* [PowerPC] Eliminate loads/swap feeding swap/store for vector type by using bi...Zi Xuan Wu2019-07-311-0/+12
* [PowerPC] Replace float load/store pair with integer load/store pair when it'...Zi Xuan Wu2019-07-231-0/+12
* PowerPC/SPE: Fix load/store handling for SPEJustin Hibbits2019-07-171-0/+5
* [Codegen][X86][AArch64][ARM][PowerPC] Inc-of-add vs sub-of-not (PR42457)Roman Lebedev2019-07-031-0/+2
* PowerPC: Optimize SPE double parameter calling setupJustin Hibbits2019-06-171-8/+9
* [TargetLowering] Add MachineMemOperand::Flags to allowsMemoryAccess tests (PR...Simon Pilgrim2019-06-121-4/+4
* Remove unused PPC.h includes under llvm/lib/Target/PowerPC.Dmitri Gribenko2019-06-061-1/+0
* Implement call lowering without parameters on AIXJason Liu2019-05-241-1/+10
* [PowerPC] [ISEL] select x-form instruction for unaligned offsetChen Zheng2019-05-221-6/+10
* [PowerPC] custom lower `v2f64 fpext v2f32`Lei Huang2019-05-101-0/+8
* [TargetLowering] Change getOptimalMemOpType to take a function attribute listSjoerd Meijer2019-04-301-1/+1
* [PowerPC] Allow using initial-exec TLS with PICJoerg Sonnenberger2019-04-241-2/+2
* [PowerPC] fix trivial typos in comment, NFCHiroshi Inoue2019-04-091-2/+2
* [PowerPC] Strength reduction of multiply by a constant by shift and add/sub i...Zi Xuan Wu2019-03-291-0/+1
* [TargetLowering] Add code size information on isFPImmLegal. NFCAdhemerval Zanella2019-03-181-1/+2
* [PowerPC] Avoid scalarization of vector truncateRoland Froese2019-02-111-0/+2
* [PPC] Include tablegenerated PPCGenCallingConv.inc onceReid Kleckner2019-01-291-26/+0
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [PowerPC] Implement the isSelectSupported() target hookKang Zhang2018-12-201-0/+5
* [PowerPC]Exploit P9 vabsdu for unsigned vselect patternsKewen Lin2018-12-191-0/+1
* [PowerPC] Improve vec_abs on P9Kewen Lin2018-12-181-0/+17
* [NFC] [PowerPC] add an routine in PPCTargetLowering to determine if a global ...QingShan Zhang2018-12-031-0/+3
* [TargetLowering] Change TargetLoweringBase::getPreferredVectorAction to take ...Craig Topper2018-11-051-1/+1
* [PowerPC] Fix some missed optimization opportunities in combineSetCCLi Jia He2018-10-261-0/+1
* [PowerPC] Keep vector int to fp conversions in vector domainNemanja Ivanovic2018-10-261-0/+3
* [Power9] Add __float128 support in the backend for bitcast to a i128Stefan Pintilie2018-10-231-0/+1
* [PowerPC] Implement hasBitPreservingFPLogic for types that can be supportedNemanja Ivanovic2018-10-091-0/+1
* [PowerPC] Combine ADD to ADDZEQingShan Zhang2018-09-071-0/+1
* [PowerPC] Recommit r340016 after fixing the reported issueNemanja Ivanovic2018-08-271-0/+4
* Temporarily Revert "[PowerPC] Generate Power9 extswsli extend sign and shift ...Eric Christopher2018-08-211-4/+0
* [PowerPC] Generate Power9 extswsli extend sign and shift immediate instructionNemanja Ivanovic2018-08-171-0/+4
* [DAGCombiner][TargetLowering] Pass a SmallVector instead of a std::vector to ...Craig Topper2018-07-301-1/+1
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