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| author | Ehsan Amiri <amehsan@ca.ibm.com> | 2016-10-24 17:31:09 +0000 |
|---|---|---|
| committer | Ehsan Amiri <amehsan@ca.ibm.com> | 2016-10-24 17:31:09 +0000 |
| commit | c90b02cf5035819577fa7defa08902cf63a8b749 (patch) | |
| tree | f8f23b18362f4afe9ec0a7eae6f780ae8111a89c /llvm/lib/Target/PowerPC/PPCISelLowering.h | |
| parent | 47f2616b6a491baa600ae2a1cdca43276be2bf2f (diff) | |
| download | bcm5719-llvm-c90b02cf5035819577fa7defa08902cf63a8b749.tar.gz bcm5719-llvm-c90b02cf5035819577fa7defa08902cf63a8b749.zip | |
[PPC] Generate positive FP zero using xor insn instead of loading from constant area
https://reviews.llvm.org/D23614
Currently we load +0.0 from constant area. That can change to be generated using
XOR instruction.
llvm-svn: 284995
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.h')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.h b/llvm/lib/Target/PowerPC/PPCISelLowering.h index 3d4ec27c5a6..2944e99db01 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.h +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.h @@ -769,6 +769,7 @@ namespace llvm { bool useLoadStackGuardNode() const override; void insertSSPDeclarations(Module &M) const override; + bool isFPImmLegal(const APFloat &Imm, EVT VT) const override; private: struct ReuseLoadInfo { SDValue Ptr; |
