| Commit message (Expand) | Author | Age | Files | Lines |
| * | For PR387: | Reid Spencer | 2006-08-28 | 1 | -0/+1 |
| * | Implement Regression/CodeGen/PowerPC/bswap-load-store.ll by folding bswaps | Chris Lattner | 2006-07-10 | 1 | -1/+13 |
| * | Make PPC call lowering more aggressive, making the isel matching code simple | Chris Lattner | 2006-05-17 | 1 | -1/+9 |
| * | Instead of implementing LowerCallTo directly, let the default impl produce an | Chris Lattner | 2006-05-16 | 1 | -8/+0 |
| * | Switch the PPC backend over to using FORMAL_ARGUMENTS for formal argument | Chris Lattner | 2006-05-16 | 1 | -4/+0 |
| * | Implement an important entry from README_ALTIVEC: | Chris Lattner | 2006-04-18 | 1 | -1/+8 |
| * | Rename get_VSPLI_elt -> get_VSPLTI_elt | Chris Lattner | 2006-04-12 | 1 | -2/+2 |
| * | Change the interface to the predicate that determines if vsplti* can be used. | Chris Lattner | 2006-04-08 | 1 | -4/+5 |
| * | Match vpku[hw]um(x,x). | Chris Lattner | 2006-04-06 | 1 | -7/+3 |
| * | Add support for matching vmrg(x,x) patterns | Chris Lattner | 2006-04-06 | 1 | -2/+2 |
| * | Pattern match vmrg* instructions, which are now lowered by the CFE into shuff... | Chris Lattner | 2006-04-06 | 1 | -0/+8 |
| * | Support pattern matching vsldoi(x,y) and vsldoi(x,x), which allows the f.e. to | Chris Lattner | 2006-04-06 | 1 | -0/+8 |
| * | Compile the vpkuhum/vpkuwum intrinsics into vpkuhum/vpkuwum instead of into | Chris Lattner | 2006-04-06 | 1 | -0/+8 |
| * | Ask legalize to promote all vector shuffles to be v16i8 instead of having to | Chris Lattner | 2006-04-04 | 1 | -2/+2 |
| * | Inform the dag combiner that the predicate compares only return a low bit. | Chris Lattner | 2006-04-02 | 1 | -0/+5 |
| * | Lower vector compares to VCMP nodes, just like we lower vector comparison | Chris Lattner | 2006-03-31 | 1 | -0/+6 |
| * | Use normal lvx for scalar_to_vector instead of lve*x. They do the exact | Chris Lattner | 2006-03-28 | 1 | -8/+0 |
| * | Codegen vector predicate compares. | Chris Lattner | 2006-03-26 | 1 | -0/+11 |
| * | Remove PPC:isZeroVector, use ISD::isBuildVectorAllZeros instead | Evan Cheng | 2006-03-26 | 1 | -4/+0 |
| * | Codegen things like: | Chris Lattner | 2006-03-25 | 1 | -0/+5 |
| * | add support for using vxor to build zero vectors. This implements | Chris Lattner | 2006-03-24 | 1 | -0/+4 |
| * | When possible, custom lower 32-bit SINT_TO_FP to this: | Chris Lattner | 2006-03-22 | 1 | -0/+7 |
| * | fix duplicate definition errors | Chris Lattner | 2006-03-20 | 1 | -2/+2 |
| * | Check in some intermediate code that adds a skeleton for matching vsplt* | Chris Lattner | 2006-03-20 | 1 | -1/+13 |
| * | Custom lower arbitrary VECTOR_SHUFFLE's to VPERM. | Chris Lattner | 2006-03-20 | 1 | -0/+4 |
| * | Custom lower SCALAR_TO_VECTOR into lve*x. | Chris Lattner | 2006-03-19 | 1 | -0/+8 |
| * | Added getTargetLowering() to TargetMachine. Refactored targets to support this. | Evan Cheng | 2006-03-13 | 1 | -0/+4 |
| * | Compile this: | Chris Lattner | 2006-03-01 | 1 | -0/+5 |
| * | Use a target-specific dag-combine to implement CodeGen/PowerPC/fp-int-fp.ll. | Chris Lattner | 2006-03-01 | 1 | -0/+2 |
| * | split register class handling from explicit physreg handling. | Chris Lattner | 2006-02-22 | 1 | -2/+2 |
| * | Updates to match change of getRegForInlineAsmConstraint prototype | Chris Lattner | 2006-02-21 | 1 | -1/+2 |
| * | Implement getConstraintType for PPC. | Chris Lattner | 2006-02-07 | 1 | -0/+1 |
| * | Add the simple PPC integer constraints | Chris Lattner | 2006-02-07 | 1 | -1/+1 |
| * | add info about the inline asm register constraints for PPC | Chris Lattner | 2006-01-31 | 1 | -0/+4 |
| * | Use PPCISD::CALL instead of ISD::CALL | Chris Lattner | 2006-01-27 | 1 | -1/+4 |
| * | Make llvm.frame/returnaddr not crash on ppc | Chris Lattner | 2006-01-27 | 1 | -4/+0 |
| * | Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for | Nate Begeman | 2006-01-27 | 1 | -3/+0 |
| * | First part of bug 680: | Nate Begeman | 2006-01-25 | 1 | -7/+0 |
| * | Give PPCISD:: nodes legible names in dumps. | Chris Lattner | 2006-01-09 | 1 | -0/+4 |
| * | Pattern-match return. Includes gross hack! | Nate Begeman | 2005-12-20 | 1 | -2/+4 |
| * | Prepare support for AltiVec multiply, divide, and sqrt. | Nate Begeman | 2005-12-13 | 1 | -0/+4 |
| * | Use new PPC-specific nodes to represent shifts which require the 6-bit | Chris Lattner | 2005-12-06 | 1 | -0/+6 |
| * | Add an initial hack at legalizing GlobalAddress into the appropriate nodes | Chris Lattner | 2005-11-17 | 1 | -0/+11 |
| * | Add the ability to lower return instructions to TargetLowering. This | Nate Begeman | 2005-10-18 | 1 | -0/+3 |
| * | More PPC32 -> PPC changes, as well as merging some classes that were | Nate Begeman | 2005-10-16 | 1 | -3/+3 |
| * | Rename PowerPC*.h to PPC*.h | Chris Lattner | 2005-10-14 | 1 | -1/+1 |
| * | Implement i64<->fp using the fctidz/fcfid instructions on PowerPC when we | Nate Begeman | 2005-09-06 | 1 | -3/+9 |
| * | Move FCTIWZ handling out of the instruction selectors and into legalization, | Chris Lattner | 2005-08-31 | 1 | -0/+4 |
| * | implement SELECT_CC fully for the DAG->DAG isel! | Chris Lattner | 2005-08-26 | 1 | -0/+3 |
| * | Make fsel emission work with both the pattern and dag-dag selectors, by | Chris Lattner | 2005-08-26 | 1 | -1/+14 |