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authorEvan Cheng <evan.cheng@apple.com>2006-03-13 23:20:37 +0000
committerEvan Cheng <evan.cheng@apple.com>2006-03-13 23:20:37 +0000
commit2dd2c652b21f9cbfd67d7524b80bb86c51130b90 (patch)
tree63054a50b9d8a8e7cc2fbc94f5bb2a870f7198df /llvm/lib/Target/PowerPC/PPCISelLowering.h
parent60f495100a048cc1a6e50e7e68ee5157b2b6c83c (diff)
downloadbcm5719-llvm-2dd2c652b21f9cbfd67d7524b80bb86c51130b90.tar.gz
bcm5719-llvm-2dd2c652b21f9cbfd67d7524b80bb86c51130b90.zip
Added getTargetLowering() to TargetMachine. Refactored targets to support this.
llvm-svn: 26742
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.h')
-rw-r--r--llvm/lib/Target/PowerPC/PPCISelLowering.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.h b/llvm/lib/Target/PowerPC/PPCISelLowering.h
index a89727d2f7b..b406e4e7996 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.h
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.h
@@ -109,6 +109,10 @@ namespace llvm {
getRegClassForInlineAsmConstraint(const std::string &Constraint,
MVT::ValueType VT) const;
bool isOperandValidForConstraint(SDOperand Op, char ConstraintLetter);
+
+ /// isLegalAddressImmediate - Return true if the integer value can be used
+ /// as the offset of the target addressing mode.
+ virtual bool isLegalAddressImmediate(int64_t V) const;
};
}
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